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dts: arm: ti: Remove use of CONFIG_SOC_* from TI & Silabs SoC dts files #9946

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merged 2 commits into from
Sep 14, 2018
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dts: arm: ti: Remove use of CONFIG_SOC_* from TI & Silabs SoC dts files #9946

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251502a
dts: arm: ti: Remove use of CONFIG_SOC_* from TI SoC dts files
galak Sep 12, 2018
6e6008d
dts: arm: silabs: Remove use of CONFIG_SOC_* from Silabs SoC dts files
galak Sep 12, 2018
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2 changes: 1 addition & 1 deletion boards/arm/cc3220sf_launchxl/cc3220sf_launchxl.dts
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@@ -1,6 +1,6 @@
/dts-v1/;

#include <ti/cc32xx.dtsi>
#include <ti/cc3220sf.dtsi>

/ {
model = "TI CC3220SF LaunchXL";
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2 changes: 1 addition & 1 deletion boards/arm/efm32wg_stk3800/efm32wg_stk3800.dts
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Expand Up @@ -5,7 +5,7 @@
*/

/dts-v1/;
#include <silabs/efm32wg.dtsi>
#include <silabs/efm32wg990f256.dtsi>

/ {
model = "Silicon Labs EFM32WG STK3800 board";
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2 changes: 1 addition & 1 deletion boards/arm/efr32_slwstk6061a/efr32_slwstk6061a.dts
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Expand Up @@ -5,7 +5,7 @@
*/

/dts-v1/;
#include <silabs/efr32fg1p.dtsi>
#include <silabs/efr32fg1p133f256gm48.dtsi>

/ {
model = "Silicon Labs EFR32 SLWSTK6061A board";
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2 changes: 1 addition & 1 deletion boards/arm/msp_exp432p401r_launchxl/msp_exp432p401r_launchxl.dts
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@@ -1,6 +1,6 @@
/dts-v1/;

#include <ti/msp432p4xx.dtsi>
#include <ti/msp432p401r.dtsi>

/ {
model = "TI MSP-EXP432P401R LaunchXL";
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6 changes: 0 additions & 6 deletions dts/arm/silabs/efm32wg.dtsi
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@@ -1,5 +1,4 @@
#include <arm/armv7-m.dtsi>
#include <silabs/mem.h>

/ {
cpus {
Expand All @@ -11,11 +10,6 @@
flash0: flash {
compatible = "soc-nv-flash";
label = "FLASH_0";
reg = <0 DT_FLASH_SIZE>;
};

sram0: memory {
reg = <0x20000000 DT_SRAM_SIZE>;
};

soc {
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18 changes: 18 additions & 0 deletions dts/arm/silabs/efm32wg990f256.dtsi
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@@ -0,0 +1,18 @@
/*
* Copyright (c) 2018 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <mem.h>
#include <silabs/efm32wg.dtsi>

/ {
flash {
reg = <0 DT_SIZE_K(256)>;
};

sram0: memory {
reg = <0x20000000 DT_SIZE_K(32)>;
};
};
6 changes: 0 additions & 6 deletions dts/arm/silabs/efr32fg1p.dtsi
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@@ -1,5 +1,4 @@
#include <arm/armv7-m.dtsi>
#include <silabs/mem.h>

/ {
cpus {
Expand All @@ -11,11 +10,6 @@
flash0: flash {
compatible = "soc-nv-flash";
label = "FLASH_0";
reg = <0 DT_FLASH_SIZE>;
};

sram0: memory {
reg = <0x20000000 DT_SRAM_SIZE>;
};

soc {
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18 changes: 18 additions & 0 deletions dts/arm/silabs/efr32fg1p133f256gm48.dtsi
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@@ -0,0 +1,18 @@
/*
* Copyright (c) 2018 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <mem.h>
#include <silabs/efr32fg1p.dtsi>

/ {
flash {
reg = <0 DT_SIZE_K(256)>;
};

sram0: memory {
reg = <0x20000000 DT_SIZE_K(32)>;
};
};
16 changes: 0 additions & 16 deletions dts/arm/silabs/mem.h
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This file was deleted.

24 changes: 24 additions & 0 deletions dts/arm/ti/cc3220sf.dtsi
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@@ -0,0 +1,24 @@
/*
* Copyright (c) 2018 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <mem.h>
#include <ti/cc32xx.dtsi>

/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(256)>;
};

flash0: serial-flash@0 {
reg = <0x0 DT_SIZE_K(1024)>;
};

flash1: flash@1000000 {
compatible = "soc-nv-flash";
label = "FLASH_1";
reg = <0x01000000 DT_SIZE_K(1024)>;
};
};
11 changes: 0 additions & 11 deletions dts/arm/ti/cc32xx.dtsi
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@@ -1,6 +1,5 @@
#include <arm/armv7-m.dtsi>

#include <ti/mem.h>
#include <dt-bindings/i2c/i2c.h>

#define INT_UARTA0 21 // UART0 Rx and Tx
Expand Down Expand Up @@ -28,22 +27,12 @@
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
reg = <DT_SRAM_START DT_SRAM_SIZE>;
};

flash0: serial-flash@0 {
compatible = "serial-flash";
reg = <0x0 DT_SFLASH_SIZE>;
};

#if defined(CONFIG_SOC_CC3220SF)
flash1: flash@1000000 {
compatible = "soc-nv-flash";
label = "FLASH_1";
reg = <0x01000000 DT_FLASH_SIZE>;
};
#endif

soc {
uart0: uart@4000C000 {
compatible = "ti,cc32xx-uart";
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25 changes: 0 additions & 25 deletions dts/arm/ti/mem.h
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This file was deleted.

18 changes: 18 additions & 0 deletions dts/arm/ti/msp432p401r.dtsi
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@@ -0,0 +1,18 @@
/*
* Copyright (c) 2018 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <mem.h>
#include <ti/msp432p4xx.dtsi>

/ {
sram0: memory {
reg = <0x20000000 DT_SIZE_K(64)>;
};

flash0: serial-flash {
reg = <0x0 DT_SIZE_K(256)>;
};
};
3 changes: 0 additions & 3 deletions dts/arm/ti/msp432p4xx.dtsi
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@@ -1,5 +1,4 @@
#include <arm/armv7-m.dtsi>
#include <ti/mem.h>

/ {
cpus {
Expand All @@ -10,12 +9,10 @@

sram0: memory {
compatible = "sram";
reg = <DT_SRAM_START DT_SRAM_SIZE>;
};

flash0: serial-flash {
compatible = "serial-flash";
reg = <0x0 DT_FLASH_SIZE>;
};

soc {
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13 changes: 13 additions & 0 deletions dts/common/mem.h
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@@ -0,0 +1,13 @@
/*
* Copyright (c) 2018 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/

#ifndef __DT_MEM_H
#define __DT_MEM_H

#define DT_SIZE_K(x) ((x) * 1024)
#define DT_SIZE_M(x) ((x) * 1024 * 1024)

#endif /* __DT_BINDING_TI_MEM_H */