Add MCXN947 sai module support #77534

mcuxted · 2024-08-26T03:04:07Z

Add sai instances on MCXN947.
Update sai driver.
Port i2s_speed case on FRDM-mCXN947 and test passed locally.
support sai clock for syscon.

github-actions · 2024-08-26T03:04:46Z

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mcuxted · 2024-08-26T03:04:57Z

Thanks to @hakehuang for helping debug i2s_speed to find the i2s driver problem and fix it.

hakehuang · 2024-08-26T10:28:09Z

need add i2s in boards/nxp/frdm_mcxn947_mcxn947_cpu0.yaml, supports list

DerekSnell

Thank you @mcuxted ,
Can you please update the doc page?

boards/nxp/frdm_mcxn947/doc/index.rst

DerekSnell · 2024-11-13T14:18:43Z

What is left too be able to merge this PR?
Hi @ehughes ,
The merge window is closed right now because the repo is in the stabilization phase for the upcoming v4.0 release. This PR passes all the compliance checks and has the approvals needed. So it should merge quickly after the v4.0 release.

Best regards

danieldegrasse · 2024-11-18T16:26:54Z

drivers/i2s/i2s_mcux_sai.c

+{
+	const struct i2s_mcux_config *dev_cfg = dev->config;
+
+#ifdef CONFIG_I2S_HAS_PLL_SETTING


Not a blocking comment, just a general concern- we probably need to consider a more generic way to set the MCLK pin direction here. The block here seems to be specific to the RT1xxx series parts, but configuring the MCLK pin is an operation generic across I2S peripherals.

Perhaps we need an SOC specific function to handle this? @DerekSnell are you aware, does the MCLK direction setting end up being very SOC-specific? IE would it make the most sense to implement it as SOC specific code?

Hi @danieldegrasse and @mcuxted ,
Sorry, I do not have experience with these SAI SOC differences. I think it would be best to refer to the MCUXpresso SDK driver examples for the different SOCs. It appears these are the MCUs supported in Zephyr today with the SAI: RT10xx, RT11xx, RT700, MCXC, MCXN, Kinetis K like K22F12.

Hi @DerekSnell, I have updated it according to the latest code, adding pinmuxes to uniformly modify the direction of mclk

kartben · 2024-12-10T01:30:25Z

@mcuxted needs rebase to resolve merge conflict

mmahadevan108 · 2025-01-08T17:47:15Z

boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dts

+	status = "okay";
+};
+&sai0 {
+	status = "okay";


This should be added to the _qspi variant as well.

Moved configuration to frdm_mcxn947_mcxn947_cpu0.dtsi

mmahadevan108 · 2025-01-08T20:19:10Z

boards/nxp/frdm_mcxn947/board.c

-		.pllmdiv = SCG_SPLLMDIV_MDIV(10U),
-		.pllRate = 80000000U
-	};
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai1))


Is the FlexCAN clock setup deleted?

The clock source of flexcan has been switched to kFRO_HF_to_FLEXCAN0

However I don't see flexcan in this list?

The original clk source of flexcan is pll1. Due to the conflict with sai mclk clock source, the clock source of flexcan is switched from kPLL1_CLK0_to_FLEXCAN0 to kFRO_HF_to_FLEXCAN0 to ensure the use of flexcan(CLOCK_AttachClk(kFRO_HF_to_FLEXCAN0);).

@mcuxted , can you please look at this code?

@hakehuang , can we confirm that this change does not break Flexcan support on this board.

@mmahadevan108 good point. looks OK for all timings

2025-01-16 19:18:10,194 - twister - DEBUG - DEVICE: *** Booting Zephyr OS build v4.0.0-2200-g227d86b63ed2 *** 2025-01-16 19:18:10,197 - twister - DEBUG - DEVICE: Running TESTSUITE can_timing 2025-01-16 19:18:10,203 - twister - DEBUG - DEVICE: =================================================================== 2025-01-16 19:18:10,207 - twister - DEBUG - DEVICE: testing on device can@d4000 @ 48000000 Hz 2025-01-16 19:18:10,208 - twister - DEBUG - DEVICE: START - test_timing 2025-01-16 19:18:10,221 - twister - DEBUG - DEVICE: testing bitrate 10000, sample point 87.5%: sjw = 1, prop_seg = 8, phase_seg1 = 8, phase_seg2 = 3, prescaler = 240 OK, sample point error 2.5% 2025-01-16 19:18:10,233 - twister - DEBUG - DEVICE: testing bitrate 20000, sample point 87.5%: sjw = 1, prop_seg = 6, phase_seg1 = 7, phase_seg2 = 2, prescaler = 150 OK, sample point error 0.0% 2025-01-16 19:18:10,245 - twister - DEBUG - DEVICE: testing bitrate 50000, sample point 87.5%: sjw = 1, prop_seg = 6, phase_seg1 = 7, phase_seg2 = 2, prescaler = 60 OK, sample point error 0.0% 2025-01-16 19:18:10,258 - twister - DEBUG - DEVICE: testing bitrate 125000, sample point 87.5%: sjw = 1, prop_seg = 6, phase_seg1 = 7, phase_seg2 = 2, prescaler = 24 OK, sample point error 0.0% 2025-01-16 19:18:10,269 - twister - DEBUG - -- west flash: using runner jlink 2025-01-16 19:18:10,269 - twister - DEBUG - DEVICE: testing bitrate 250000, sample point 87.5%: sjw = 1, prop_seg = 6, phase_seg1 = 7, phase_seg2 = 2, prescaler = 12 OK, sample point error 0.0% 2025-01-16 19:18:10,282 - twister - DEBUG - DEVICE: testing bitrate 500000, sample point 87.5%: sjw = 1, prop_seg = 6, phase_seg1 = 7, phase_seg2 = 2, prescaler = 6 OK, sample point error 0.0% 2025-01-16 19:18:10,295 - twister - DEBUG - DEVICE: testing bitrate 800000, sample point 80.0%: sjw = 2, prop_seg = 7, phase_seg1 = 8, phase_seg2 = 4, prescaler = 3 OK, sample point error 0.0% 2025-01-16 19:18:10,307 - twister - DEBUG - DEVICE: testing bitrate 1000000, sample point 75.0%: sjw = 2, prop_seg = 5, phase_seg1 = 6, phase_seg2 = 4, prescaler = 3 OK, sample point error 0.0% 2025-01-16 19:18:10,310 - twister - DEBUG - DEVICE: PASS - test_timing in 0.100 seconds 2025-01-16 19:18:10,316 - twister - DEBUG - DEVICE: =================================================================== 2025-01-16 19:18:10,319 - twister - DEBUG - DEVICE: START - test_timing_data 2025-01-16 19:18:10,322 - twister - DEBUG - DEVICE: SKIP - test_timing_data in 0.001 seconds 2025-01-16 19:18:10,328 - twister - DEBUG - DEVICE: =================================================================== 2025-01-16 19:18:10,331 - twister - DEBUG - DEVICE: TESTSUITE can_timing succeeded 2025-01-16 19:18:10,335 - twister - DEBUG - DEVICE: ------ TESTSUITE SUMMARY START ------ 2025-01-16 19:18:10,343 - twister - DEBUG - DEVICE: SUITE PASS - 100.00% [can_timing]: pass = 1, fail = 0, skip = 1, total = 2 duration = 0.101 seconds 2025-01-16 19:18:10,348 - twister - DEBUG - DEVICE: - PASS - [can_timing.test_timing] duration = 0.100 seconds 2025-01-16 19:18:10,354 - twister - DEBUG - DEVICE: - SKIP - [can_timing.test_timing_data] duration = 0.001 seconds 2025-01-16 19:18:10,357 - twister - DEBUG - DEVICE: ------ TESTSUITE SUMMARY END ------ 2025-01-16 19:18:10,364 - twister - DEBUG - DEVICE: =================================================================== 2025-01-16 19:18:10,367 - twister - DEBUG - DEVICE: RunID: e34ce6648f488d5bfb13441d421780dd 2025-01-16 19:18:10,370 - twister - DEBUG - DEVICE: PROJECT EXECUTION SUCCESSFUL

Thanks @hakehuang . Can you please approve this PR if it looks good to you per your testing.

mmahadevan108 · 2025-01-08T20:41:21Z

dts/bindings/i2s/nxp,mcux-i2s.yaml

+
+pinmux-cells:
+  - pin
+  - function


Why is this added?

In some devices, the core will set the direction of mclk with dts. MCXN9 does not have relevant register settings, but there is an mclk direction setting inside the driver, so add relevant configuration.

mmahadevan108 · 2025-01-08T22:29:40Z

drivers/i2s/i2s_mcux_sai.c

@@ -1065,6 +1066,7 @@ static void i2s_mcux_isr(void *arg)

 static void audio_clock_settings(const struct device *dev)
 {
+#ifdef CONFIG_I2S_HAS_PLL_SETTING


Instead of adding a Kconfig, ideally we should move this code out of the driver and into the soc.c file. This may not be required as part of this PR. If you can do it then that would be great.

I also agree that the PLL configuration should be moved out of the i2s driver and configured using other methods，This may also cause the pll configuration to be overwritten.
In MCXN9, we can use the SDK to configure the PLL in the board.h. Is it a way to control the PLL outside the driver on other devices?

Add sai clock support for syscon. Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

i2s driver have not suooprt frdm_mcxn947 pll clk set. so add macro CONFIG_I2S_HAS_PLL_SETTING to control pll init. Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

Add sai nodes for NXP mcxn94x Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

Support sai for NXP frdm_mcxn947. Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

Support i2s example for NXP frdm_mcxn947 Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

DerekSnell

i2s_speed test passes on my FRDM-MCXN947 board, and this LGTM. Thank you, @mcuxted

github-actions · 2025-01-17T01:13:37Z

Hi @mcuxted!
Congratulations on getting your very first Zephyr pull request merged 🎉🥳. This is a fantastic achievement, and we're thrilled to have you as part of our community!

To celebrate this milestone and showcase your contribution, we'd love to award you the Zephyr Technical Contributor badge. If you're interested, please claim your badge by filling out this form: Claim Your Zephyr Badge.

Thank you for your valuable input, and we look forward to seeing more of your contributions in the future! 🪁

mcuxted requested review from mmahadevan108 and dleach02 as code owners August 26, 2024 03:04

zephyrbot added area: I2S platform: NXP NXP area: Clock Control platform: NXP Drivers NXP Semiconductors, drivers labels Aug 26, 2024

zephyrbot requested review from anangl, butok, danieldegrasse, dbaluta, decsny, DerekSnell, EmilioCBen, manuargue, MarkWangChinese, nordic-krch and yvanderv August 26, 2024 03:04

zephyrbot assigned anangl Aug 26, 2024

mcuxted force-pushed the add_mcxn10_sai_module_support branch from ec29530 to c465de2 Compare August 26, 2024 03:22

mcuxted force-pushed the add_mcxn10_sai_module_support branch 3 times, most recently from 9c540b1 to a30544e Compare August 29, 2024 08:04

carlescufi assigned DerekSnell and mmahadevan108 and unassigned anangl Aug 29, 2024

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DerekSnell previously requested changes Aug 30, 2024

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boards/nxp/frdm_mcxn947/doc/index.rst Outdated Show resolved Hide resolved

danieldegrasse reviewed Nov 18, 2024

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mcuxted dismissed stale reviews from hakehuang and DerekSnell via f76b784 December 12, 2024 06:10

mcuxted force-pushed the add_mcxn10_sai_module_support branch 2 times, most recently from f76b784 to e3291f9 Compare December 12, 2024 08:11

hakehuang self-requested a review December 12, 2024 10:13

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mcuxted dismissed hakehuang’s stale review via b884cb8 December 17, 2024 08:44

mcuxted force-pushed the add_mcxn10_sai_module_support branch from e3291f9 to b884cb8 Compare December 17, 2024 08:44

mmahadevan108 reviewed Jan 8, 2025

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mcuxted force-pushed the add_mcxn10_sai_module_support branch from b884cb8 to 227d86b Compare January 10, 2025 02:56

mcuxted added 5 commits January 16, 2025 11:13

clock: driver/clock_control: Add sai clock support for syscon.

9c8fa33

Add sai clock support for syscon. Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

drivers: drivers/i2s: fix sai issue for support frdm_mcxn497

55ffc95

i2s driver have not suooprt frdm_mcxn947 pll clk set. so add macro CONFIG_I2S_HAS_PLL_SETTING to control pll init. Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

dts: arm/nxp/mcxn94x: Add sai nodes for NXP mcxn94x

aebbd9f

Add sai nodes for NXP mcxn94x Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

boards: nxp/frdm_mcxn947: Support sai for NXP frdm_mcxn947

a2a3d70

Support sai for NXP frdm_mcxn947. Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

samples: drivers/i2s: Support i2s example for NXP frdm_mcxn947

a959efd

Support i2s example for NXP frdm_mcxn947 Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>

mmahadevan108 force-pushed the add_mcxn10_sai_module_support branch from 227d86b to a959efd Compare January 16, 2025 17:14

mmahadevan108 approved these changes Jan 16, 2025

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mmahadevan108 requested review from DerekSnell, mmahadevan108 and hakehuang January 16, 2025 17:16

mmahadevan108 approved these changes Jan 16, 2025

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DerekSnell approved these changes Jan 16, 2025

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kartben merged commit 97f4838 into zephyrproject-rtos:main Jan 17, 2025
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Add MCXN947 sai module support #77534

Add MCXN947 sai module support #77534

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Add MCXN947 sai module support #77534

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