drivers: adc: stm32: dma support #52965
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This was referenced Dec 14, 2022
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This test contained NXP specific functions, for example the counter trigger, which is not required for all ADC DMA implementations. Also moved NXP specific kconfigs to appropriate board files Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
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I added an addtional commit to remove |
These test uses DMA which sometimes require buffers to be placed in custom specific section. This is not compatible with ztest userspace, which requires variables to be placed in a specific partition. Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Adds nucleo_h732zi ADC DMA unit tests with multiple channels. The STM32 ADC DMA driver requires the buffers to be placed in a non-cacheable memory region as defined by the DMA. Therefore this adds configurability to the test to change the region the buffer is placed in. Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Previously the contents of buffers after an ADC DMA read was simply printed, but not verified with an zassert that the value was updated. This commit updates it to be similar to the adc_api test that fills the buffer initially with a known value, which is then used to ensure the ADC DMA functioned successfully. Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
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erwango
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Mar 13, 2023
gautierg-st
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Mar 14, 2023
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DNM until @FRASTM could have a chance to review (probably today) |
FRASTM
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Mar 20, 2023
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Mar 21, 2023
STM32 ADC DMA support added in zephyrproject-rtos#52965 incorrectly assumed that all ADC devices have a OVR flag. This commit changes the driver to only account for it if it's found in the LL drivers. Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
carlescufi
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Mar 22, 2023
STM32 ADC DMA support added in #52965 incorrectly assumed that all ADC devices have a OVR flag. This commit changes the driver to only account for it if it's found in the LL drivers. Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
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In zephyrproject-rtos#53184 a linker section for SRAM4 was added because it's required for use with the STM32H7 BDMA. Now in zephyrproject-rtos#52965 support was added for the ADC DMA which expects a similar linker section which is non-cachable, but is limited to use SRAM4 to place it's buffers. This commit gives the user more flexibility to use any SRAM region to place buffers to use with ADC DMA. The region SRAM0 isn't supported because it doesn't have the "zephyr,memory-region" compatibility required to turn it into a non-cacheable region, meaning it doesn't fit the mentioned use case. Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
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The STM32 ADC already supports sampling multiple channels in one sequence. This nwo PR allows those channels to be read in one go using the DMA.
Support for multiple channel sampling for the STM32 was originally part of this PR, but split off in #53534.
Currently dependent on #54156 for a final check
Notes:
bdmawhich will add support for running ADC3 through DMA as well.ADC_ACTION_REPEAT. Adding continous sampling will require changes toadc_context, which has an open discussion here: New ADC Interface for Continuous Sampling #48478