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samples: boards: nxp: add sample for using psi5 driver
Add sample for using psi5 driver on s32z Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
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| # SPDX-License-Identifier: Apache-2.0 | ||
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| cmake_minimum_required(VERSION 3.20.0) | ||
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| find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) | ||
| project(psi5) | ||
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| target_sources(app PRIVATE src/main.c) |
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samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu0.overlay
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| /* | ||
| * Copyright 2024 NXP | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| &pinctrl { | ||
| psi5_0_default: psi5_0_default { | ||
| group1 { | ||
| pinmux = <PA7_PSI5_0_SDOUT1>, <PB3_PSI5_0_SDOUT2>; | ||
| output-enable; | ||
| }; | ||
| group2 { | ||
| pinmux = <PA6_PSI5_0_SDIN1>, <PB2_PSI5_0_SDIN2>; | ||
| input-enable; | ||
| }; | ||
| }; | ||
| }; | ||
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| &psi5_0 { | ||
| pinctrl-0 = <&psi5_0_default>; | ||
| pinctrl-names = "default"; | ||
| status = "okay"; | ||
| }; | ||
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| &psi5_0_ch1 { | ||
| target-pulse-us = <500>; | ||
| decoder-offset-us = <0>; | ||
| low-pulse-width-us = <100>; | ||
| high-pulse-width-us = <127>; | ||
| tx-mode = "long-frame-31"; | ||
| num-rx-buf = <32>; | ||
| rx-bitrate-kbps = <189>; | ||
| array-slot-duration-us = <150>; | ||
| array-slot-start-offset-us = <110>; | ||
| array-slot-data-length = <16>; | ||
| array-slot-data-msb-first = <0>; | ||
| array-slot-has-smc = <0>; | ||
| array-slot-has-parity = <0>; | ||
| status = "okay"; | ||
| }; | ||
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| &psi5_0_ch2 { | ||
| target-pulse-us = <8>; | ||
| decoder-offset-us = <0>; | ||
| low-pulse-width-us = <2>; | ||
| high-pulse-width-us = <6>; | ||
| tx-mode = "long-frame-31"; | ||
| num-rx-buf = <32>; | ||
| rx-bitrate-kbps = <189>; | ||
| array-slot-duration-us = <500>; | ||
| array-slot-start-offset-us = <0>; | ||
| array-slot-data-length = <16>; | ||
| array-slot-data-msb-first = <0>; | ||
| array-slot-has-smc = <0>; | ||
| array-slot-has-parity = <0>; | ||
| status = "okay"; | ||
| }; |
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samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu1.overlay
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| /* | ||
| * Copyright 2024 NXP | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| &pinctrl { | ||
| psi5_0_default: psi5_0_default { | ||
| group1 { | ||
| pinmux = <PA7_PSI5_0_SDOUT1>, <PB3_PSI5_0_SDOUT2>; | ||
| output-enable; | ||
| }; | ||
| group2 { | ||
| pinmux = <PA6_PSI5_0_SDIN1>, <PB2_PSI5_0_SDIN2>; | ||
| input-enable; | ||
| }; | ||
| }; | ||
| }; | ||
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| &psi5_0 { | ||
| pinctrl-0 = <&psi5_0_default>; | ||
| pinctrl-names = "default"; | ||
| status = "okay"; | ||
| }; | ||
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| &psi5_0_ch1 { | ||
| target-pulse-us = <500>; | ||
| decoder-offset-us = <0>; | ||
| low-pulse-width-us = <100>; | ||
| high-pulse-width-us = <127>; | ||
| tx-mode = "long-frame-31"; | ||
| num-rx-buf = <32>; | ||
| rx-bitrate-kbps = <189>; | ||
| array-slot-duration-us = <150>; | ||
| array-slot-start-offset-us = <110>; | ||
| array-slot-data-length = <16>; | ||
| array-slot-data-msb-first = <0>; | ||
| array-slot-has-smc = <0>; | ||
| array-slot-has-parity = <0>; | ||
| status = "okay"; | ||
| }; | ||
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| &psi5_0_ch2 { | ||
| target-pulse-us = <8>; | ||
| decoder-offset-us = <0>; | ||
| low-pulse-width-us = <2>; | ||
| high-pulse-width-us = <6>; | ||
| tx-mode = "long-frame-31"; | ||
| num-rx-buf = <32>; | ||
| rx-bitrate-kbps = <189>; | ||
| array-slot-duration-us = <500>; | ||
| array-slot-start-offset-us = <0>; | ||
| array-slot-data-length = <16>; | ||
| array-slot-data-msb-first = <0>; | ||
| array-slot-has-smc = <0>; | ||
| array-slot-has-parity = <0>; | ||
| status = "okay"; | ||
| }; |
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| CONFIG_PSI5=y | ||
| CONFIG_PSI5_LOG_LEVEL_DBG=y | ||
| CONFIG_LOG=y |
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| sample: | ||
| description: Sample for using PSI5 driver | ||
| name: NXP S32 PSI5 sample | ||
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| tests: | ||
| sample.boards.nxp_s32.psi5: | ||
| platform_allow: | ||
| - s32z2xxdc2/s32z270/rtu0 | ||
| - s32z2xxdc2/s32z270/rtu1 | ||
| - s32z2xxdc2@D/s32z270/rtu0 | ||
| - s32z2xxdc2@D/s32z270/rtu1 | ||
| depends_on: psi5 | ||
| tags: psi5 | ||
| harness: console |
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| /* | ||
| * Copyright 2024 NXP | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| #include <zephyr/logging/log.h> | ||
| LOG_MODULE_REGISTER(nxp_s32_psi5_sample, LOG_LEVEL_DBG); | ||
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| #include <zephyr/kernel.h> | ||
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| #include <zephyr/drivers/psi5/psi5.h> | ||
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| #define PSI5_NODE DT_INST(0, nxp_s32_psi5) | ||
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| /* Use pin B2 for simulate PSI5 signal from sensor to board */ | ||
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| #define GPIO_BASE 0x40521700 | ||
| #define MSRC_BASE 0x40520280 | ||
| #define GPIO_PIN 2 | ||
| #define GPIO_SET(val) sys_write16(BIT(15 - val), GPIO_BASE) | ||
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| void timing_delay_2_5_us(void) | ||
| { | ||
| uint64_t start_cycles = arm_arch_timer_count(); | ||
| uint64_t cycles_to_wait = 20; | ||
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| for (;;) { | ||
| uint64_t current_cycles = arm_arch_timer_count(); | ||
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| if ((current_cycles - start_cycles) >= cycles_to_wait) { | ||
| break; | ||
| } | ||
| } | ||
| } | ||
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| /* Simulate a PSI5 message with 2 start bits, 16 data bits (0xAD2C), and 3 CRC bits (0x4). */ | ||
| void data_sensor_to_board_simulation(void) | ||
| { | ||
| int key; | ||
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| sys_write32(BIT(21), MSRC_BASE + GPIO_PIN * 4); | ||
| key = irq_lock(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| timing_delay_2_5_us(); | ||
| timing_delay_2_5_us(); | ||
| timing_delay_2_5_us(); | ||
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| /* s1, s2 */ | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| /* 0011 */ | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| /* 0100 */ | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| /* 1011 */ | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| /* 0101 */ | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| /* CRC */ | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| timing_delay_2_5_us(); | ||
| GPIO_SET(GPIO_PIN); | ||
| timing_delay_2_5_us(); | ||
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| GPIO_SET(0); | ||
| irq_unlock(key); | ||
| } | ||
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| void tx_cb(const struct device *dev, uint8_t channel_id, enum psi5_state state, void *user_data) | ||
| { | ||
| LOG_INF("Tx channel %d completed\n", channel_id); | ||
| } | ||
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| void rx_cb(const struct device *dev, uint8_t channel_id, struct psi5_frame *frame, | ||
| enum psi5_state state, void *user_data) | ||
| { | ||
| if (state == PSI5_STATE_MSG_RECEIVED) { | ||
| LOG_INF("Rx channel %d completed data (0x%x)\n", channel_id, frame->msg.data); | ||
| } else { | ||
| LOG_INF("Rx channel %d err (0x%x)\n", channel_id, state); | ||
| } | ||
| } | ||
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| int main(void) | ||
| { | ||
| const struct device *const dev = DEVICE_DT_GET(PSI5_NODE); | ||
| uint64_t send_data = 0x1234; | ||
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| /* test receive data */ | ||
| psi5_add_rx_callback(dev, 1, rx_cb, NULL); | ||
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| psi5_start(dev, 1); | ||
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| /* delay generate data after pusle sync */ | ||
| k_busy_wait(100); | ||
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| data_sensor_to_board_simulation(); | ||
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| k_sleep(K_MSEC(1)); | ||
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| psi5_stop(dev, 1); | ||
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| /* test send data */ | ||
| psi5_start(dev, 2); | ||
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| psi5_send(dev, 2, send_data, K_MSEC(100), tx_cb, NULL); | ||
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| return 0; | ||
| } |