[tracegen] Add tracegen support for the BOOM L1D #362
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zhemao
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I split up the shim logic into its own module, and split up the mixins for instantiating the BOOM tracegen. |
colinschmidt
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Backport from #362 h/t @jerryz123
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colinschmidt
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Backport from #362 h/t @jerryz123
zhemao
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Jan 21, 2020
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| when (io.tracegen.req.fire()) { | ||
| rob_tail := WrapInc(rob_tail, rob_sz) | ||
| rob_bsy(rob_tail) := true.B |
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Aren't rob_head and rob_tail backwards here? Entries are placed into a circular buffer at the head and taken out at the tail.
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This follow's BOOM's ROB naming scheme.
| io.tracegen.req.ready := (!rob_bsy(rob_tail) && | ||
| !rob_wait_till_empty && | ||
| (ready_for_amo || !(isAMO(io.tracegen.req.bits.cmd) || io.tracegen.req.bits.cmd === M_XLR || io.tracegen.req.bits.cmd === M_XSC)) && | ||
| (WrapInc(rob_tail, rob_sz) =/= rob_head) && |
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This always leaves one entry in the ROB empty. Take a look at Chisel's queue implementation to see how you can detect full queues properly.
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Take a look at this part of the Chisel codebase to see how to detect queue empty/full correctly. |
zhemao
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Depends on #358 's BOOM bump