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Add Verilog blackbox FireSim simulation example #297

Merged
merged 3 commits into from
Oct 16, 2019
Merged

Add Verilog blackbox FireSim simulation example #297

merged 3 commits into from
Oct 16, 2019

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albert-magyar
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@albert-magyar albert-magyar commented Oct 12, 2019 •
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This provides an example design with a GCD MMIO peripheral with a Verilog blackbox in FireChip. It can be pushed through FPGA simulation with firesim/firesim#388 and ucb-bar/midas#150.

@albert-magyar albert-magyar force-pushed the verilog-blackbox-firesim branch from 36ca33a to fef60e8 Compare October 12, 2019 02:44
davidbiancolin
davidbiancolin approved these changes Oct 13, 2019
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I'm good with this, but it would be good to have a non-GG developer give an opinion

@davidbiancolin davidbiancolin requested a review from sagark October 13, 2019 13:12
abejgonzalez
abejgonzalez reviewed Oct 13, 2019
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@albert-magyar albert-magyar force-pushed the verilog-blackbox-firesim branch from fef60e8 to d1f5784 Compare October 14, 2019 07:42
abejgonzalez
abejgonzalez approved these changes Oct 15, 2019
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Lgtm

@albert-magyar albert-magyar force-pushed the verilog-blackbox-firesim branch from 83a522c to cf9a936 Compare October 16, 2019 04:31
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@abejgonzalez @davidbiancolin I reverted the FireSim pointer to what's in dev, since this PR doesn't actually depend on any FireSim changes, as long as nobody is using the new target. For now, it will just add the new FireChip target.

@albert-magyar albert-magyar merged commit 0d5bcf9 into dev Oct 16, 2019
@albert-magyar albert-magyar deleted the verilog-blackbox-firesim branch October 16, 2019 21:32
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@davidbiancolin davidbiancolin davidbiancolin approved these changes

@abejgonzalez abejgonzalez abejgonzalez approved these changes

@sagark sagark Awaiting requested review from sagark

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@albert-magyar @davidbiancolin @abejgonzalez