2110263 DIGITAL COMPUTER LOGIC LABORATORY I Course in Chulalongkorn University (2024) By Worralop Srichainont
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_01_01 |
Wire Connection | Circuit |
Solution |
| 2 | diglab_01_02 |
Logic Gate | Circuit |
Solution |
| 3 | diglab_01_03 |
Clock Gate | Circuit |
Solution |
| 4 | diglab_01_04 |
Dual Clock | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_02_01 |
XOR (Sum of Products) | Circuit |
Solution |
| 2 | diglab_02_02 |
XOR (Product of Sums) | Circuit |
Solution |
| 3 | diglab_02_03 |
FullAdder (Sum of Products) | Circuit |
Solution |
| 4 | diglab_02_04 |
FullAdder (Product of Sums) | Circuit |
Solution |
| 5 | diglab_02_05 |
Comparator (Sum of Products) | Circuit |
Solution |
| 6 | diglab_02_06 |
Comparator (Product of Sums) | Circuit |
Solution |
| 7 | diglab_02_07 |
Multiplexer (Sum of Products) | Circuit |
Solution |
| 8 | diglab_02_08 |
Multiplexer (Product of Sums) | Circuit |
Solution |
| 9 | diglab_02_09 |
Mux4:1 (Sum of Products) | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_03_01 |
BCD to Seven Segment Decoder | Circuit |
Solution |
| 2 | diglab_03_02 |
DigLoLab ASCII | Circuit |
Solution |
| 3 | diglab_03_03 |
Binary Encoder | Circuit |
Solution |
| 4 | diglab_03_04 |
Hamming Code | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_04_01 |
Half Adder (Onsite) | Circuit |
Solution |
| 2 | diglab_04_02 |
Full Adder (Onsite) | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_05_01 |
Glitch I | Circuit |
Solution |
| 2 | diglab_05_02 |
Glitch II | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_06_01 |
ALU | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_07_01 |
Simple Memory | Circuit |
Solution |
| 2 | diglab_07_02 |
RS Latch (NOR) | Circuit |
Solution |
| 3 | diglab_07_03 |
Master-Slave JK Flip-flop | Circuit |
Solution |
| 4 | diglab_07_04 |
Positive Edge Trigger D Flip-flop | Circuit |
Solution |
| 5 | diglab_07_05 |
Positive Edge Trigger T Flip-flop | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_08_01 |
Counter 74163 | Circuit |
Solution |
| 2 | diglab_08_02 |
Serial Adder | Circuit |
Solution |
| 3 | diglab_08_03 |
Mealy Single Pulser | Circuit |
Solution |
| 4 | diglab_08_04 |
Mealy Single Pulser with Synchronizer | Circuit |
Solution |
| 5 | diglab_08_05 |
Moore Single Pulser | Circuit |
Solution |
| No | Problem Code | Name | ASM Chart | Circuit | Solution |
|---|---|---|---|---|---|
| 1 | diglab_09_01 |
Vending Machine | ASM Chart |
Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | diglab_10_01 |
Sorting Circuit | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | Midterm_CP_2024_01 |
Combinational Circuit | Circuit |
Solution |
| 2 | Midterm_CP_2024_02 |
Bits Priority | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | Final_CEDT_2024_01 |
Customized Counter | Circuit |
Solution |
| 2 | Final_CEDT_2024_02 |
Maximum Rectangle Area | Circuit |
Solution |
| 3 | Final_CEDT_2024_03 |
Increasing Number | Circuit |
Solution |
| No | Problem Code | Name | Circuit | Solution |
|---|---|---|---|---|
| 1 | Final_CP_2024_01 |
??? | Circuit |
Solution |
| 2 | Final_CP_2024_02 |
??? | Circuit |
Solution |
| 3 | Final_CP_2024_03 |
??? | Circuit |
Solution |