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Support parameterized multiports in C++ #387
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This change adds widthof() operator to the grammar which allows to determine the width of a port. This is optionally used in ASTUtils to precisely specify the bank width for multiport connections based on all the port widths on the right side of the connection.
After delays on multiport connections with (potentially) parameterized width turned out to be really tricky. The problem is, that the AST transformation for after delays does not infer the width of the generated bank of delays. It uses a "variable" width, which means that the precise width needs to be inferred by the generator. However, this is not trivial and I don't know how to infer the width at runtime without providing additional information. I talked to @edwardalee yesterday about this problem. He suggested to not use AST transformations, but support after delays directly in the C++ runtime. This is something I actually wanted to try for a long time, so I did that today. However, this turned out to be far from trivial. The main problem is that we can have various kinds of connections in a chain (input to contained input, output to input, contained output to output) and all those connections can have associated delays. I didn't find a straight forward way to deal with all the different corner-cases and I think that supporting delayed connections might require a significant redesign of the C++ runtime. So I abandoned that plan for now... I actually found another solution to the problem which is probably a bit hacky. Essentially, I introduced the @edwardalee @lhstrh What do you think of this approach? Do you think its a viable solution to the problem? |
I'm not sure this will solve the problem in general. What if you have the following widths:
And you connect them as follows:
Then I think there will be three inserted delay reactors with widths 2, 1, and 1. |
For your example, the LF code generated by the AST transformation would look like this: I am not sure why you think that three delay reactors would be inserted. As far as I can see, the AST transformation always generates one bank of delay reactors per after connection, where the width of the delay bank is the summed width of all ports (and banks) on the right side of the connection. If the referenced port is a multiport within a bank, The scope of the |
I would like to merge this soon if possible. @edwardalee @lhstrh Do you think the |
The |
Ok, I am also not too sure about |
Github does not offer me a button to approve this pull request, so I don't see how I could be blocking it. |
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OK, I found the hidden button...
This PR adds support for parameterized multiport and bank widths for the C++ target. Since parameters are assigned at runtime in C++, this is achieved by resolving the precise widths at runtime and letting the generated code draw the connections as needed. For this to work, actually only a small library function was added to
lib/lfutil.hh
and no bigger changes inreactor-cpp
where required.This PR is based on #375, and should only be merged after merging #375.Related to #386, #377, #343, #193, #209
Closes #349, #190