Skip to content
This repository has been archived by the owner on Dec 8, 2022. It is now read-only.

NimBLE AFR update and provision to use IRAM memory as 8-bit addressable memory region #1713

Merged
merged 3 commits into from
May 1, 2020

Conversation

sachin0x18
Copy link
Contributor

@sachin0x18 sachin0x18 commented Jan 27, 2020

Description

Add Host based Privacy feature support:

This feature removes dependency on controller to use privacy (RPA).
Add support to configure RPA Timeout from menuconfig (default is 15 minutes)
How to use this feature:

  • Introduced API to configure privacy : ble_hs_pvcy_rpa_config()
  • own_addr_type needs to be set to BLE_ADDR_RANDOM while advertising/scanning.
    Apart from 'Host based privacy', this PR has few miscellaneous feature and fixes.
  • Configure Host (ble_hs_cfg) to distribute IRKs (BLE_SM_PAIR_KEY_DIST_ID)
    Apart from 'Host based privacy', this PR has few miscellaneous feature and fixes.

Use IRAM as Data memory

IRAM in ESP32 is 32-bit addressable memory region and performing any unaligned (8-bit or 16-bit) load/store instructions on this region results in either LoadStoreError or LoadStoreAlignment exception.
With the LoadStore exception handlers in place (inside freertos-kernel), IRAM can be used as 8-bit addressable memory region to store data. Performing unaligned access in IRAM will incur a maximum penalty of 167 cpu cycles.

  • Dynamic memory allocation:
    -- Use dynamic buffers instead of static memory.
    -- Added IRAM allocation provision under nimble_platform_mem_malloc().

  • Allocate mbedTLS buffers in IRAM:
    -- Allocate mbedTLS input and output buffers in the IRAM region thus saving ~12kB (with the default configuration) in DRAM.
    To enable this strategy,

    idf.py menuconfig -> Component config -> ESP32 Specific -> Enable IRAM as 8 bit accessible memory

    idf.py menuconfig -> Component config -> mbedTLS -> Memory allocation strategy -> Internal IRAM

Checklist:

  • I have tested my changes. No regression in existing tests.

  • My code is Linted.

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

@sachin0x18
Copy link
Contributor Author

This PR depends on FreeRTOS/FreeRTOS-Kernel#9 as well as #1709

.gitmodules Outdated Show resolved Hide resolved
@sachin0x18 sachin0x18 marked this pull request as ready for review April 20, 2020 21:36
@sachin0x18 sachin0x18 force-pushed the esp32/iram_as_8bit branch 2 times, most recently from 1887387 to 5776384 Compare April 21, 2020 10:41
@sachin0x18 sachin0x18 changed the title Provision to use IRAM memory as 8-bit addressable memory region NimBLE AFR update and provision to use IRAM memory as 8-bit addressable memory region Apr 21, 2020
@sachin0x18 sachin0x18 requested a review from lundinc2 April 21, 2020 14:39
@lundinc2
Copy link
Contributor

/bot run checks

@ravibhagavandas
Copy link
Contributor

Verified the nimble changes by running the tests. To enable RPA feature , it also requires the fix mentioned in this PR: apache/mynewt-nimble#790

@mahavirj
Copy link
Contributor

@ravibhagavandas Requested change will be followup commit, so we can merge this PR interim. @prasad-alatkar Please confirm.

@prasad-alatkar
Copy link
Contributor

@ravibhagavandas @mahavirj Yes, I am planning a new PR for this commit along with other changes (under progress).

@ravibhagavandas
Copy link
Contributor

/bot run checks

lundinc2
lundinc2 previously approved these changes Apr 28, 2020
@lundinc2
Copy link
Contributor

/bot run checks

1 similar comment
@lundinc2
Copy link
Contributor

/bot run checks

@lundinc2
Copy link
Contributor

Hello,

Can you try re-basing your branch to the latest master branch? It seems some files unrelated to this PR are causing the style check to fail.

Thank you

@sachin0x18 sachin0x18 dismissed stale reviews from lundinc2 and ravibhagavandas via 0863aeb April 30, 2020 06:10
@sachin0x18 sachin0x18 requested a review from lundinc2 April 30, 2020 06:20
@lundinc2
Copy link
Contributor

/bot run checks

@lundinc2 lundinc2 removed the Draft label Apr 30, 2020
@lundinc2
Copy link
Contributor

/bot run checks

@lundinc2
Copy link
Contributor

Hello,

Apologies for the inconvenience. This PR fixes the styling issue #1961. So one last rebase should do the trick. I will continue to investigate what has caused the issues to surface with this particular PR.

lundinc2
lundinc2 previously approved these changes Apr 30, 2020
prasad-alatkar and others added 3 commits May 1, 2020 05:06
Added IRAM allocation provision under nimble_platform_mem_malloc()
"Internal IRAM" strategy allocates in/out buffers in IRAM thus
saving memory in DRAM.

To select this strategy:

idf.py menuconfig -> Component config -> ESP32 Specific -> Enable IRAM as 8 bit accessible memory

idf.py menuconfig -> Component config -> mbedTLS -> Memory allocation strategy -> Internal IRAM
@lundinc2
Copy link
Contributor

lundinc2 commented May 1, 2020

/bot run checks

1 similar comment
@lundinc2
Copy link
Contributor

lundinc2 commented May 1, 2020

/bot run checks

@cobusve cobusve merged commit 2193cb1 into aws:master May 1, 2020
alfred2g pushed a commit to alfred2g/amazon-freertos that referenced this pull request May 5, 2020
…le memory region (aws#1713)

* NimBLE AFR: Update esp-idf submodule to include Host based Privacy (RPA)
* NimBLE AFR: Add support to IRAM allocation strategy

Added IRAM allocation provision under nimble_platform_mem_malloc()

* esp32/mbedtls: Added in/out buffer allocation strategy

"Internal IRAM" strategy allocates in/out buffers in IRAM thus
saving memory in DRAM.

To select this strategy:

idf.py menuconfig -> Component config -> ESP32 Specific -> Enable IRAM as 8 bit accessible memory

idf.py menuconfig -> Component config -> mbedTLS -> Memory allocation strategy -> Internal IRAM

Co-authored-by: Prasad Alatkar <prasad.alatkar@espressif.com>
Sign up for free to subscribe to this conversation on GitHub. Already have an account? Sign in.
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

6 participants