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NVM toml fix (MRAM) #5506

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Oct 25, 2021
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2 changes: 1 addition & 1 deletion ports/atmel-samd/supervisor/qspi_flash.c
Original file line number Diff line number Diff line change
Expand Up @@ -243,7 +243,7 @@ void spi_flash_init(void) {

// The QSPI is only connected to one set of pins in the SAMD51 so we can hard code it.
#ifdef EXTERNAL_FLASH_QSPI_SINGLE
uint32_t pins[] = {PIN_PA08, PIN_PB10, PIN_PB11};
uint32_t pins[] = {PIN_PA08, PIN_PA09, PIN_PA10, PIN_PA11, PIN_PB10, PIN_PB11};
#elif defined(EXTERNAL_FLASH_QSPI_DUAL)
uint32_t pins[] = {PIN_PA08, PIN_PA09, PIN_PB10, PIN_PB11};
#else
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3 changes: 3 additions & 0 deletions supervisor/shared/external_flash/devices.h.jinja
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,9 @@
.supports_qspi_writes = {{ device["32_qspi_write"] | lower() }}, \
.write_status_register_split = {{ device.write_status_register_split | lower() }}, \
.single_status_byte = {{ (device.quad_enable_status_byte == 1) | lower() }}, \
.no_ready_bit = {{ (device.no_ready_bit == 1) | lower() }}, \
.no_erase_cmd = {{ (device.no_erase_cmd == 1) | lower() }}, \
.no_reset_cmd = {{ (device.no_reset_cmd == 1) | lower() }}, \
}
{% endfor %}

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