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Merge pull request #5727 from tannewt/rpi_neopixel
Add neopixel support on PWM capable pins
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| Original file line number | Diff line number | Diff line change |
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| /* | ||
| * This file is part of the MicroPython project, http://micropython.org/ | ||
| * | ||
| * The MIT License (MIT) | ||
| * | ||
| * Copyright (c) 2021 Scott Shawcroft for Adafruit Industries | ||
| * | ||
| * Permission is hereby granted, free of charge, to any person obtaining a copy | ||
| * of this software and associated documentation files (the "Software"), to deal | ||
| * in the Software without restriction, including without limitation the rights | ||
| * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | ||
| * copies of the Software, and to permit persons to whom the Software is | ||
| * furnished to do so, subject to the following conditions: | ||
| * | ||
| * The above copyright notice and this permission notice shall be included in | ||
| * all copies or substantial portions of the Software. | ||
| * | ||
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
| * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
| * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
| * THE SOFTWARE. | ||
| */ | ||
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| #include "shared-bindings/neopixel_write/__init__.h" | ||
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| #include "py/runtime.h" | ||
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| #include "shared-bindings/microcontroller/__init__.h" | ||
| #include "shared-bindings/digitalio/DigitalInOut.h" | ||
| #include "shared-bindings/time/__init__.h" | ||
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| #include "peripherals/broadcom/cpu.h" | ||
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| #include "supervisor/port.h" | ||
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| uint64_t next_start_raw_ticks = 0; | ||
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| // NeoPixels are 800khz bit streams. Zeroes are 1/3 duty cycle (~416ns) and ones | ||
| // are 2/3 duty cycle (~833ns). | ||
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| void common_hal_neopixel_write(const digitalio_digitalinout_obj_t *digitalinout, | ||
| uint8_t *pixels, uint32_t num_bytes) { | ||
| // Wait to make sure we don't append onto the last transmission. This should only be a tick or | ||
| // two. | ||
| while (port_get_raw_ticks(NULL) < next_start_raw_ticks) { | ||
| } | ||
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| BP_Function_Enum alt_function; | ||
| uint8_t index; | ||
| uint8_t channel; | ||
| bool found = false; | ||
| for (size_t i = 0; i < NUM_ALT_FUNC; i++) { | ||
| const pin_function_t *f = &digitalinout->pin->functions[i]; | ||
| if (f->type == PIN_FUNCTION_PWM) { | ||
| index = f->index; | ||
| channel = f->function; | ||
| alt_function = FSEL_VALUES[i]; | ||
| found = true; | ||
| break; | ||
| } | ||
| } | ||
| if (!found) { | ||
| mp_raise_ValueError(translate("NeoPixel not supported on pin")); | ||
| return; | ||
| } | ||
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| // Turn on the PWM clock. The speed is NeoPixel specific. | ||
| if (CM_PWM->CS_b.BUSY == 0) { | ||
| uint32_t source_clock; | ||
| #if BCM_VERSION == 2711 | ||
| source_clock = 54000000; | ||
| #else | ||
| source_clock = 19200000; | ||
| #endif | ||
| // Three clocks per 800khz bit to get the 1/3 or 2/3 timing. | ||
| uint32_t target_clock = 3 * 800000; | ||
| uint32_t int_div = source_clock / target_clock; | ||
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| CM_PWM->DIV = CM_PCM_DIV_PASSWD_PASSWD << CM_PCM_DIV_PASSWD_Pos | | ||
| (int_div) << CM_PCM_DIV_DIVI_Pos; | ||
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| CM_PWM->CS = CM_PCM_CS_PASSWD_PASSWD << CM_PCM_CS_PASSWD_Pos | | ||
| CM_PCM_CS_SRC_XOSC << CM_PCM_CS_SRC_Pos; | ||
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| // Set enable after setting the source to ensure it is stable. | ||
| CM_PWM->CS = CM_PCM_CS_PASSWD_PASSWD << CM_PCM_CS_PASSWD_Pos | | ||
| CM_PCM_CS_SRC_XOSC << CM_PCM_CS_SRC_Pos | | ||
| CM_PCM_CS_ENAB_Msk; | ||
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| // Wait for the clock to start up. | ||
| COMPLETE_MEMORY_READS; | ||
| while (CM_PWM->CS_b.BUSY == 0) { | ||
| } | ||
| } | ||
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| PWM0_Type *pwm = PWM0; | ||
| #if BCM_VERSION == 2711 | ||
| if (index == 1) { | ||
| pwm = PWM1; | ||
| } | ||
| #else | ||
| (void)index; | ||
| #endif | ||
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| pwm->RNG1 = 24; | ||
| pwm->RNG2 = 24; | ||
| COMPLETE_MEMORY_READS; | ||
| pwm->CTL = PWM0_CTL_CLRF1_Msk; | ||
| COMPLETE_MEMORY_READS; | ||
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| // Even though we're only transmitting one channel, we enable both. Without | ||
| // the second channel enabled, the output is repeated forever. | ||
| pwm->CTL = | ||
| PWM0_CTL_USEF2_Msk | | ||
| PWM0_CTL_MODE2_Msk | | ||
| PWM0_CTL_USEF1_Msk | | ||
| PWM0_CTL_MODE1_Msk; | ||
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| COMPLETE_MEMORY_READS; | ||
| pwm->CTL |= PWM0_CTL_PWEN1_Msk | PWM0_CTL_PWEN2_Msk; | ||
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| gpio_set_function(digitalinout->pin->number, alt_function); | ||
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| for (size_t i = 0; i < num_bytes; i++) { | ||
| uint32_t expanded = 0; | ||
| for (size_t j = 0; j < 8; j++) { | ||
| expanded = expanded >> 3; | ||
| if ((pixels[i] & (1 << j)) != 0) { | ||
| expanded |= 0xc0000000; | ||
| } else { | ||
| expanded |= 0x80000000; | ||
| } | ||
| } | ||
| while (pwm->STA_b.FULL1 == 1) { | ||
| RUN_BACKGROUND_TASKS; | ||
| } | ||
| if (channel == 1) { | ||
| // Dummy value for the first channel. | ||
| pwm->FIF1 = 0x000000; | ||
| } | ||
| pwm->FIF1 = expanded; | ||
| if (channel == 0) { | ||
| // Dummy value for the second channel. | ||
| pwm->FIF1 = 0x000000; | ||
| } | ||
| } | ||
| // Wait just a little bit so that transmission can start. | ||
| common_hal_mcu_delay_us(2); | ||
| while (pwm->STA_b.STA1 == 1) { | ||
| RUN_BACKGROUND_TASKS; | ||
| } | ||
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| gpio_set_function(digitalinout->pin->number, GPIO_FUNCTION_OUTPUT); | ||
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| // Update the next start. | ||
| next_start_raw_ticks = port_get_raw_ticks(NULL) + 1; | ||
| } |
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Submodule peripherals
updated
21 files
| +69 −155 | broadcom/boot.s | |
| +164 −0 | broadcom/boot8.s | |
| +4 −0 | broadcom/cpu.h | |
| +3 −1 | broadcom/defines.h | |
| +103 −2 | broadcom/gen/bcm2711_lpa.h | |
| +103 −2 | broadcom/gen/bcm2837_lpa.h | |
| +14 −14 | broadcom/gen/pins.c | |
| +1 −1 | broadcom/gen/pins.c.jinja | |
| +8 −0 | broadcom/interrupts.c | |
| +4 −4 | broadcom/link.ld | |
| +37 −0 | broadcom/link8.ld | |
| +8 −1 | broadcom/pins.h | |
| +19 −0 | gen_svd.py | |
| +6 −1 | svd/chips/bcm2711.svd.jinja | |
| +59 −0 | svd/chips/bcm2835.svd.jinja | |
| +6 −1 | svd/chips/bcm2837.svd.jinja | |
| +117 −0 | svd/gen/bcm2711_lpa.svd | |
| +18,023 −0 | svd/gen/bcm2835_lpa.svd | |
| +117 −0 | svd/gen/bcm2837_lpa.svd | |
| +113 −0 | svd/peripherals/bcm_clock_manager.svd.jinja | |
| +0 −0 | system_bcm2835_lpa.h |
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