Add EP size to fp names. Fix paste definition.

[poeschlr]

In the end this PR will add the EP size definition to all footprints that have an external pad.
I use this also to fix the paste definitions of the footprints that i touch.

When this is finished, i will also make a PR for the packages3d repo and the symbol repo to get them in line with this PR.

[poeschlr]

@jkriege2 could it be that travis is not working for this PR? (It says everything is ok but i think there should be more output in the report. I also think it should report some errors.)

[poeschlr]

This should be ready now. Remaining travis errors are from the THT pads used for thermal vias footprints. (We might need to add an exception to that rule check.)

I checked the footprints multiple times and i am sure they are better now then they were. I don't suggest that there is no error left in them. (I hope i did not introduce new errors however.)

[evanshultz]

OK. I only did a very cursory check. We do need to update the scripts to ignore thermal pad errors because there are several causes where bogus errors are created.

[poeschlr]

I know. I think one way to reduce false positives is by turning off this error if the footprint name contains _ThermalVias. Maybe in addition check if a smd pad on top and bottom with the same pad number exist. (A perfect check would also test the position of the THT pads against these pads but i think that might be too much work.)

[evanshultz]

I agree. For robustness, I think checking for a via with matching pin number inside a copper pad is best.

Also, we should not generate an error if a paste opening if embedded inside a copper pad. The paste opening should not have a pin number, either.

While we're talking about scripts, should the check scripts be a pinned repo at https://github.com/KiCad? Should the footprint generator scripts be migrated to https://github.com/KiCad as well, and pinned there too?

[evanshultz]

@poeschlr
Can you please confirm how you want thermal via mask handled? Just to be absolutely clear. Here is HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask3x3mm_ThermalVias:

The mask is opened under the EP.

So in the official KiCad library, mask should be over vias by default. Mask is only removed over vias indirectly if the mask is removed for another reason.

I'm wanting to make sure the latest comment at KiCad/kicad-symbols#289 is answered properly.

[poeschlr]

Yes normally the vias them selves are only copper.
If they are in an area where another pad defines a mask opening then they are of course not covered by the solder mask film. (so in your screenshot the middle 9 areas are not covered by plastic and the outer 3 on either end are covered by it.) So in other words the outer vias are tented. (Requires the fab to be able to make them.)

I guess the guy in 289 wants to make vias that are tended on the top side to avoid paste to be wicked down the open via.
When i originally laid down our current way of doing it i found a good guide that listed all the pros and cons for different methods. Sadly i can't seem to find that any more.
As far as i remember having open vias should be ok as long as they have a small drill size (<0.35mm or so)

One thing i found is this discussion on the fourm https://forum.kicad.info/t/a-help-with-qfn-footprint-with-thermal-vias-and-solder-paste/5293 It shows that we could choose from a lot of different options (I seem to remember an even better and more detailed discussion but i can't even find that any more.)

What i found this time around:
This NXP guide mentions the stuff about using small vias: https://www.nxp.com/docs/en/application-note/AN1902.pdf
Analog devices list of options without recommentation: http://www.analog.com/media/en/technical-documentation/application-notes/EE352.pdf
Cypress (no recommendation for thermal vias other than size and count) http://www.cypress.com/file/140006/download

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Edit:
something more detailed found: https://randy-clemmons.blogspot.co.at/2014/08/via-covering-recommendations.html

https://www.digikey.com/en/articles/techzone/2010/dec/optimizing-pcb-thermal-performance-for-cree-xlamp-leds

https://www.infineon.com/dgdl/an-1091.pdf?fileId=5546d462533600a401535595b4ad1043

The more i read about it the more i think with small enough drill sizes one can leave the vias open on both sides. (But better would be to fill the vias with copper.)

[awygle]

Note that Cypress specifically requests a top-side via mask cap for this footprint in the datasheet:

[poeschlr]

If you want to build a footprint exactly as in a datasheet prefix the footprint name with the manufacturer name.

[evanshultz]

@poeschlr
You decided to leave small vias free of mask on both sides here. I assume only vias should have mask removed on both sides, and we will not have a bottom mask opening on the bottom copper pad in the official libraries?

[poeschlr]

Yes the bottom pad and the vias should not have mask active unless there is a good reason given for it.

The top pad has mask selected unless the datasheet asks for a mask cutout of a specific size. In such cases it makes sense to create a mask only pad that handles this.
(Even if the mask cutout can be achieved by setting the mask clearance. The reasoning behind this is that this workflow reduces manual calculations. If it can not be achieved with clearance settings then it is always necessary to have a separate mask pad.)

(If in doubt, HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask2.46x2.31mm_ThermalVias is a footprint that has all possible options in one.)

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Edit: top side tenting is not really possible with the tools provided by kicad. (The thing @awygle shows in his post)
However footprint generator scripts contain the functionality to cut polygons from other polygons. This could be used to create something where the top side of the vias is covered by soldermask but the rest of the top side pad is free. (As long as for example a octagon is close enough)

I wrote a class to handle exposed pads. This already provides the functionality to keep vias free from paste. I think adding the option to top tend vias might even be less effort then the paste stuff as this should be handled by the cut function alone.