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Update the memory alignment within the Cortex-R5 port asm code #1023

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Apr 9, 2024
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16 changes: 14 additions & 2 deletions portable/GCC/ARM_CR5/portASM.S
Original file line number Diff line number Diff line change
Expand Up @@ -76,8 +76,8 @@

/* Save the floating point context, if any. */
FMRXNE R1, FPSCR
VPUSHNE {D0-D15}
PUSHNE {R1}
VPUSHNE {D0-D15}

/* Save ulPortTaskHasFPUContext itself. */
PUSH {R3}
Expand Down Expand Up @@ -110,8 +110,8 @@
CMP R1, #0

/* Restore the floating point context, if any. */
POPNE {R0}
VPOPNE {D0-D15}
POPNE {R0}
VMSRNE FPSCR, R0
#endif /* __ARM_FP */

Expand Down Expand Up @@ -147,8 +147,15 @@
FreeRTOS_SWI_Handler:
/* Save the context of the current task and select a new task to run. */
portSAVE_CONTEXT

/* Ensure bit 2 of the stack pointer is clear. */
MOV r2, sp
AND r2, r2, #4
SUB sp, sp, r2

LDR R0, vTaskSwitchContextConst
BLX R0

portRESTORE_CONTEXT


Expand Down Expand Up @@ -256,6 +263,11 @@ switch_before_exit:
POP {LR}
portSAVE_CONTEXT

/* Ensure bit 2 of the stack pointer is clear. */
MOV r2, sp
AND r2, r2, #4
SUB sp, sp, r2

/* Call the function that selects the new task to execute.
vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
instructions, or 8 byte aligned stack allocated data. LR does not need
Expand Down
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