arm64/arm64_boot.c: Fix exception caused by accesses to ICC_SRE_EL3 w…

…hen GICv3 was not implemented
zouboan · Jul 14, 2024 · c763b79 · c763b79
1 parent a8523f3
commit c763b79
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/arch/arm64/src/common/arm64_boot.c b/arch/arm64/src/common/arm64_boot.c
@@ -89,13 +89,15 @@ void arm64_boot_el3_init(void)
           SCR_SMD_BIT);   /* Do not trap SMC */
   write_sysreg(reg, scr_el3);
 
+#if CONFIG_ARM64_GIC_VERSION > 2
   reg = read_sysreg(ICC_SRE_EL3);
   reg |= (ICC_SRE_ELX_DFB_BIT |   /* Disable FIQ bypass */
           ICC_SRE_ELX_DIB_BIT |   /* Disable IRQ bypass */
           ICC_SRE_ELX_SRE_BIT |   /* System register interface is used */
           ICC_SRE_EL3_EN_BIT);    /* Enables lower Exception level access to
                                    * ICC_SRE_EL1 */
   write_sysreg(reg, ICC_SRE_EL3);
+#endif
 
   ARM64_ISB();
 }