drivers: STM32 dualcore concurrent register access protection with HSEM

[ABOSTM]

In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller

Signed-off-by: Alexandre Bourdiol alexandre.bourdiol@st.com

[zephyrbot]

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[pabigot]

Multiple functions have an exit path while the lock is still held. These should be fixed.

Also it appears that there are nested lock calls; I don't know the hardware to say whether this is safe.

[pabigot]

One clear problem newly identified, and an overall impression that the solution needs to be reconsidered to take into account protecting the lock status from mutation by interrupts. The latter is outside my area of expertise.

[ABOSTM]

I made a rebase of this PR.
Is there further comments?
or can it be reviewed and merged ?

Obsolete

[pabigot]

Just commentary: I don't have expertise to judge the technical merit of this SOC-specific solution.

I've removed my NAK under the assumption that the mis-ordered lock sequences have been fixed, and each lock is paired with an unlock (no early exits/inappropriate nested locking). From a cursory look only at the diffs github provides this seems to be true, but I have not looked at the unmodified areas of the code to confirm it.

I find it confusing that z_stm32_hsem_lock is paired with z_stm32_hsem_release. Pairing lock with unlock, or request with release, would make be more consistent with existing usage (request/release only if the lock is recursive, but I think it isn't). Since this is STM32-specific API I don't insist on this.

[ABOSTM]

I replaced z_stm32_hsem_release() by z_stm32_hsem_unlock().
I also fixed rebase regression (include model).

[ABOSTM]

Sanitychek failure: ' Sanitycheck / qemu_arc_hs:tests/portability/cmsis_rtos_v1/portability.cmsis_rtos_v1 / tests/portability/cmsis_rtos_v1/portability.cmsis_rtos_v1'

[arnopo]

just a minor comment, else LGTM