boards: wch: Bring up WCH CH56(5/9)W-EVT

CH565W-EVT and CH569W-EVT are boards by WCH for the evaluation of
CH565W and CH569W chips.

Signed-off-by: Chen Xingyu <hi@xingrz.me>

boards/wch/ch565w_evt/Kconfig.ch565w_evt

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+# Copyright (c) 2023-2024 Chen Xingyu <hi@xingrz.me>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_CH565W_EVT
+	select SOC_CH565

boards/wch/ch565w_evt/board.cmake

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+# Copyright (c) 2023-2024 Chen Xingyu <hi@xingrz.me>
+# SPDX-License-Identifier: Apache-2.0
+
+include(${ZEPHYR_BASE}/boards/common/wchisp.board.cmake)

boards/wch/ch565w_evt/board.yml

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+board:
+  name: ch565w_evt
+  vendor: wch
+  socs:
+  - name: ch565

boards/wch/ch565w_evt/ch565w_evt.dts

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+/*
+ * Copyright (c) 2023-2024 Chen Xingyu <hi@xingrz.me>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <wch/ch56x/ch565w.dtsi>
+#include <wch/ch56x/ch565w-pinctrl.dtsi>
+
+/ {
+	model = "WCH CH565W-EVT";
+	compatible = "wch,ch565w-evt";
+
+	aliases {
+		led0 = &led_0;
+		led1 = &led_1;
+		led2 = &led_2;
+	};
+
+	chosen {
+		zephyr,sram = &rams;
+		zephyr,flash = &flash;
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_0: led-0 {
+			gpios = <&gpioa 9 GPIO_ACTIVE_LOW>;
+			label = "LED0";
+		};
+
+		led_1: led-1 {
+			gpios = <&gpiob 22 GPIO_ACTIVE_LOW>;
+			label = "LED1";
+		};
+
+		led_2: led-2 {
+			gpios = <&gpiob 23 GPIO_ACTIVE_LOW>;
+			label = "LED2";
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-names = "default";
+};

boards/wch/ch565w_evt/ch565w_evt.yaml

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+identifier: ch565w_evt
+name: WCH CH565W-EVT
+type: mcu
+arch: riscv32
+toolchain:
+  - zephyr
+supported:
+  - clock-control
+  - gpio
+  - interrupt-controller
+  - pinctrl
+  - serial
+  - timer

boards/wch/ch565w_evt/ch565w_evt_defconfig

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+# Copyright (c) 2023-2024 Chen Xingyu <hi@xingrz.me>
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_GPIO=y
+CONFIG_SERIAL=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/wch/ch565w_evt/doc/index.rst

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+.. _ch565w_evt:
+
+CH565W-EVT
+##########
+
+Overview
+********
+
+The CH565W-EVT is a evaluation board for the CH565 chip.
+
+CH565/9 is a member of the QingKe V3A family developed by WCH.
+
+Hardware
+********
+- QingKe V3A RISC-V RV32IMAC core, running up to 120MHz
+- 448KB Flash
+- 32/64/96KB + 16KB SRAM
+- 49 GPIOs
+- 4 UARTs
+- 2 SPIs
+- 1 DVP
+- USB 2.0 High Speed
+- USB 3.0 Super Speed
+
+Supported Features
+==================
+The CH565W-EVT supports the following features:
+
+.. list-table::
+   :header-rows: 1
+
+   * - Peripheral
+     - Kconfig option
+     - Devicetree compatible
+   * - Clock Mux
+     - N/A
+     - :dtcompatible:`wch,ch56x-clkmux`
+   * - GPIO
+     - :kconfig:option:`CONFIG_GPIO`
+     - :dtcompatible:`wch,ch56x-gpio`
+   * - PFIC
+     - N/A
+     - :dtcompatible:`wch,ch32v-pfic`
+   * - PINCTRL
+     - :kconfig:option:`CONFIG_PINCTRL`
+     - :dtcompatible:`wch,ch5xx-pinctrl`
+   * - SYSTICK
+     - N/A
+     - :dtcompatible:`wch,ch32v-v3-systick`
+   * - UART
+     - :kconfig:option:`CONFIG_SERIAL`
+     - :dtcompatible:`wch,ch5xx-uart`
+
+Other hardware features have not been enabled yet for this board.
+
+Programming and Debugging
+*************************
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: ch565w_evt
+   :goals: build
+
+Flashing
+========
+
+The WCH MCUs can be flashed via USB (using WCHISPTool), or via WCH-Link.
+
+WCHISPTool
+----------
+
+`WCHISPTool_CMD`_ is required to flash the board. Add it to the ``PATH``
+environment variable, and refer to the tool's documentation for generating the
+device configuration file.
+
+.. code-block:: sh
+
+	west flash --device XXXX --cfg-file /path/to/CH565.ini
+
+.. _WCHISPTool_CMD:
+   https://wch-ic.com/downloads/WCHISPTool_CMD_ZIP.html

boards/wch/ch569w_evt/Kconfig.ch569w_evt

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+# Copyright (c) 2023-2024 Chen Xingyu <hi@xingrz.me>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_CH569W_EVT
+	select SOC_CH569

boards/wch/ch569w_evt/board.cmake

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+# Copyright (c) 2023-2024 Chen Xingyu <hi@xingrz.me>
+# SPDX-License-Identifier: Apache-2.0
+
+include(${ZEPHYR_BASE}/boards/common/wchisp.board.cmake)

boards/wch/ch569w_evt/board.yml

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+board:
+  name: ch569w_evt
+  vendor: wch
+  socs:
+  - name: ch569

boards/wch/ch569w_evt/ch569w_evt.dts

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+/*
+ * Copyright (c) 2023-2024 Chen Xingyu <hi@xingrz.me>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <wch/ch56x/ch569w.dtsi>
+#include <wch/ch56x/ch569w-pinctrl.dtsi>
+
+/ {
+	model = "WCH CH569W-EVT";
+	compatible = "wch,ch569w-evt";
+
+	aliases {
+		led0 = &led_0;
+		led1 = &led_1;
+		led2 = &led_2;
+	};
+
+	chosen {
+		zephyr,sram = &rams;
+		zephyr,flash = &flash;
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_0: led-0 {
+			gpios = <&gpiob 24 GPIO_ACTIVE_LOW>;
+			label = "LED0";
+		};
+
+		led_1: led-1 {
+			gpios = <&gpiob 22 GPIO_ACTIVE_LOW>;
+			label = "LED1";
+		};
+
+		led_2: led-2 {
+			gpios = <&gpiob 23 GPIO_ACTIVE_LOW>;
+			label = "LED2";
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-names = "default";
+};

boards/wch/ch569w_evt/ch569w_evt.yaml

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+identifier: ch569w_evt
+name: WCH CH569W-EVT
+type: mcu
+arch: riscv32
+toolchain:
+  - zephyr
+supported:
+  - clock-control
+  - gpio
+  - interrupt-controller
+  - pinctrl
+  - serial
+  - timer

boards/wch/ch569w_evt/ch569w_evt_defconfig

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+# Copyright (c) 2023-2024 Chen Xingyu <hi@xingrz.me>
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_GPIO=y
+CONFIG_SERIAL=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y

boards/wch/ch569w_evt/doc/index.rst

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+.. _ch569w_evt:
+
+CH569W-EVT
+##########
+
+Overview
+********
+
+The CH569W-EVT is a evaluation board for the CH569 chip.
+
+CH569/9 is a member of the QingKe V3A family developed by WCH.
+
+Hardware
+********
+- QingKe V3A RISC-V RV32IMAC core, running up to 120MHz
+- 448KB Flash
+- 32/64/96KB + 16KB SRAM
+- 49 GPIOs
+- 4 UARTs
+- 2 SPIs
+- 1 HSPI
+- USB 2.0 High Speed
+- USB 3.0 Super Speed
+
+Supported Features
+==================
+The CH569W-EVT supports the following features:
+
+.. list-table::
+   :header-rows: 1
+
+   * - Peripheral
+     - Kconfig option
+     - Devicetree compatible
+   * - Clock Mux
+     - N/A
+     - :dtcompatible:`wch,ch56x-clkmux`
+   * - GPIO
+     - :kconfig:option:`CONFIG_GPIO`
+     - :dtcompatible:`wch,ch56x-gpio`
+   * - PFIC
+     - N/A
+     - :dtcompatible:`wch,ch32v-pfic`
+   * - PINCTRL
+     - :kconfig:option:`CONFIG_PINCTRL`
+     - :dtcompatible:`wch,ch5xx-pinctrl`
+   * - SYSTICK
+     - N/A
+     - :dtcompatible:`wch,ch32v-v3-systick`
+   * - UART
+     - :kconfig:option:`CONFIG_SERIAL`
+     - :dtcompatible:`wch,ch5xx-uart`
+
+Other hardware features have not been enabled yet for this board.
+
+Programming and Debugging
+*************************
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: ch569w_evt
+   :goals: build
+
+Flashing
+========
+
+The WCH MCUs can be flashed via USB (using WCHISPTool), or via WCH-Link.
+
+WCHISPTool
+----------
+
+`WCHISPTool_CMD`_ is required to flash the board. Add it to the ``PATH``
+environment variable, and refer to the tool's documentation for generating the
+device configuration file.
+
+.. code-block:: sh
+
+	west flash --device XXXX --cfg-file /path/to/CH569.ini
+
+.. _WCHISPTool_CMD:
+   https://wch-ic.com/downloads/WCHISPTool_CMD_ZIP.html

boards/wch/index.rst

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+.. _boards-wch:
+
+WCH
+###
+
+.. toctree::
+   :maxdepth: 1
+   :glob:
+
+   **/*