dts: stm32f4: Add UART3/4/5/7/8/9/10

Add missing UARTs from the main device tree. They are declared as
disabled and can be enabled individually by each board.

Change-Id: I0ec73c59b4c3c4ee56f12ae70f2d6cdbec14fe33
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>

dts/arm/st/stm32f4.dtsi

@@ -31,12 +31,61 @@
 			status = "disabled";
 		};
 
+		usart3: uart@40004800 {
+			compatible = "st,stm32-usart", "st,stm32-uart";
+			reg = <0x40004800 0x400>;
+			interrupts = <39 0>;
+			status = "disabled";
+		};
+
+		uart4: uart@40004c00 {
+			compatible = "st,stm32-usart", "st,stm32-uart";
+			reg = <0x40004c00 0x400>;
+			interrupts = <52 0>;
+			status = "disabled";
+		};
+
+		uart5: uart@40005000 {
+			compatible = "st,stm32-usart", "st,stm32-uart";
+			reg = <0x40005000 0x400>;
+			interrupts = <53 0>;
+			status = "disabled";
+		};
+
 		usart6: uart@40011400 {
 			compatible = "st,stm32-usart", "st,stm32-uart";
 			reg = <0x40011400 0x400>;
 			interrupts = <71 0>;
 			status = "disabled";
 		};
+
+		uart7: uart@40007800 {
+			compatible = "st,stm32-usart", "st,stm32-uart";
+			reg = <0x40007800 0x400>;
+			interrupts = <82 0>;
+			status = "disabled";
+		};
+
+		uart8: uart@40007c00 {
+			compatible = "st,stm32-usart", "st,stm32-uart";
+			reg = <0x40007c00 0x400>;
+			interrupts = <83 0>;
+			status = "disabled";
+		};
+
+		uart9: uart@40011800 {
+			compatible = "st,stm32-usart", "st,stm32-uart";
+			reg = <0x40011800 0x400>;
+			interrupts = <88 0>;
+			status = "disabled";
+		};
+
+		uart10: uart@40011c00 {
+			compatible = "st,stm32-usart", "st,stm32-uart";
+			reg = <0x40011c00 0x400>;
+			interrupts = <89 0>;
+			status = "disabled";
+		};
 	};
 };