samples: boards: nxp: add sample for using psi5 driver

Add sample for using psi5 driver on s32z

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>

samples/boards/nxp/s32/psi5/CMakeLists.txt

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.20.0)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(psi5)
+
+target_sources(app PRIVATE src/main.c)

samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu0.overlay

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+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	psi5_0_default: psi5_0_default {
+		group1 {
+			pinmux = <PA7_PSI5_0_SDOUT1>, <PB3_PSI5_0_SDOUT2>;
+			output-enable;
+		};
+		group2 {
+			pinmux = <PA6_PSI5_0_SDIN1>, <PB2_PSI5_0_SDIN2>;
+			input-enable;
+		};
+	};
+};
+
+&psi5_0 {
+	pinctrl-0 = <&psi5_0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&psi5_0_ch1 {
+	target-pulse-us = <8>;
+	decoder-offset-us = <0>;
+	low-pulse-width-us = <4>;
+	high-pulse-width-us = <4>;
+	tx-mode = "short-frame-31";
+	rx-buf-size = <32>;
+	bitrate-kbps = <125>;
+	array-slot-duration-us = <1000 1000>;
+	array-slot-start-offset-us = <0 0>;
+	array-slot-data-length = <16 16>;
+	status = "okay";
+};
+
+&psi5_0_ch2 {
+	target-pulse-us = <8>;
+	decoder-offset-us = <0>;
+	low-pulse-width-us = <4>;
+	high-pulse-width-us = <4>;
+	tx-mode = "short-frame-31";
+	rx-buf-size = <32>;
+	bitrate-kbps = <125>;
+	array-slot-duration-us = <1000 1000>;
+	array-slot-start-offset-us = <0 0>;
+	array-slot-data-length = <16 16>;
+	status = "okay";
+};

samples/boards/nxp/s32/psi5/boards/s32z2xxdc2_s32z270_rtu1.overlay

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+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	psi5_0_default: psi5_0_default {
+		group1 {
+			pinmux = <PA7_PSI5_0_SDOUT1>, <PB3_PSI5_0_SDOUT2>;
+			output-enable;
+		};
+		group2 {
+			pinmux = <PA6_PSI5_0_SDIN1>, <PB2_PSI5_0_SDIN2>;
+			input-enable;
+		};
+	};
+};
+
+&psi5_0 {
+	pinctrl-0 = <&psi5_0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&psi5_0_ch1 {
+	target-pulse-us = <8>;
+	decoder-offset-us = <0>;
+	low-pulse-width-us = <4>;
+	high-pulse-width-us = <4>;
+	tx-mode = "short-frame-31";
+	rx-buf-size = <32>;
+	bitrate-kbps = <125>;
+	array-slot-duration-us = <1000 1000>;
+	array-slot-start-offset-us = <0 0>;
+	array-slot-data-length = <16 16>;
+	status = "okay";
+};
+
+&psi5_0_ch2 {
+	target-pulse-us = <8>;
+	decoder-offset-us = <0>;
+	low-pulse-width-us = <4>;
+	high-pulse-width-us = <4>;
+	tx-mode = "short-frame-31";
+	rx-buf-size = <32>;
+	bitrate-kbps = <125>;
+	array-slot-duration-us = <1000 1000>;
+	array-slot-start-offset-us = <0 0>;
+	array-slot-data-length = <16 16>;
+	status = "okay";
+};

samples/boards/nxp/s32/psi5/prj.conf

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+CONFIG_PSI5=y
+CONFIG_PSI5_LOG_LEVEL_DBG=y
+CONFIG_LOG=y
+CONFIG_LOG_MODE_MINIMAL=y

samples/boards/nxp/s32/psi5/sample.yaml

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+sample:
+  description: Sample for using PSI5 driver
+  name: NXP S32 PSI5 sample
+
+tests:
+  sample.boards.nxp_s32.psi5:
+    platform_allow:
+      - s32z2xxdc2/s32z270/rtu0
+      - s32z2xxdc2/s32z270/rtu1
+      - s32z2xxdc2@D/s32z270/rtu0
+      - s32z2xxdc2@D/s32z270/rtu1
+    depends_on: psi5
+    tags: psi5
+    harness: console

samples/boards/nxp/s32/psi5/src/main.c

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+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/logging/log.h>
+LOG_MODULE_REGISTER(nxp_s32_psi5_sample, LOG_LEVEL_DBG);
+
+#include <zephyr/kernel.h>
+
+#include <zephyr/drivers/psi5/psi5.h>
+
+#define PSI5_NODE DT_INST(0, nxp_s32_psi5_controller)
+
+void tx_cb(const struct device *dev, uint8_t channel_id, enum psi5_state state, void *user_data)
+{
+	LOG_INF("tx ch %d", channel_id);
+}
+
+void rx_cb(const struct device *dev, uint8_t channel_id, struct psi5_frame *frame,
+	   enum psi5_state state, void *user_data)
+{
+	LOG_INF("rx ch %d", channel_id);
+}
+
+int main(void)
+{
+	const struct device *const dev = DEVICE_DT_GET(PSI5_NODE);
+	uint64_t send_data = 0x123456789ABCDEF;
+
+	psi5_add_rx_callback(dev, 2, rx_cb, NULL);
+
+	psi5_start(dev, 1);
+
+	psi5_send(dev, 1, send_data, K_MSEC(100), tx_cb, NULL);
+
+	psi5_stop(dev, 1);
+
+	k_sleep(K_MSEC(100));
+
+	return 0;
+}