tests: arch: arm: add a test for the SW Vector Relaying feature

Add a test suite to validate the Software Vector Relaying
feature for Cortex-M architecture.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>

tests/arch/arm/arm_sw_vector_relay/CMakeLists.txt

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+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.13.1)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(arm_sw_vector_relay)
+
+FILE(GLOB app_sources src/*.c)
+target_sources(app PRIVATE ${app_sources})

tests/arch/arm/arm_sw_vector_relay/README.txt

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+Title: Test to verify the SW Vector Relay feature (ARM Only)
+
+Description:
+
+This test verifies that the vector table relay feature
+(CONFIG_SW_VECTOR_RELAY=y) works as expected. Only for
+ARM Cortex-M targets.
+
+---------------------------------------------------------------------------
+
+Building and Running Project:
+
+This project outputs to the console.  It can be built and executed on QEMU as
+follows:
+
+    ninja/make run
+
+---------------------------------------------------------------------------
+
+Troubleshooting:
+
+Problems caused by out-dated project information can be addressed by
+issuing one of the following commands then rebuilding the project:
+
+    ninja/make clean    # discard results of previous builds
+                        # but keep existing configuration info
+or
+    ninja/make pristine # discard results of previous builds
+                        # and restore pre-defined configuration info
+
+---------------------------------------------------------------------------
+
+Sample Output:
+
+***** Booting Zephyr OS build zephyr-v1.14.0-1726-gb95a71960622 *****
+Running test suite arm_sw_vector_relay
+===================================================================
+starting test - test_arm_sw_vector_relay
+PASS - test_arm_sw_vector_relay
+===================================================================
+Test suite arm_sw_vector_relay succeeded
+===================================================================
+PROJECT EXECUTION SUCCESSFUL

tests/arch/arm/arm_sw_vector_relay/prj.conf

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+CONFIG_ZTEST=y
+CONFIG_SW_VECTOR_RELAY=y

tests/arch/arm/arm_sw_vector_relay/src/arm_sw_vector_relay.c

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+/*
+ * Copyright (c) 2020 Nordic Semiconductor ASA.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <ztest.h>
+#include <linker/linker-defs.h>
+#include <syscall_handler.h>
+
+#include <arch/arm/aarch32/cortex_m/cmsis.h>
+
+extern uint32_t _vector_table;
+extern uint32_t __vector_relay_handler;
+extern uint32_t _vector_table_pointer;
+
+void test_arm_sw_vector_relay(void)
+{
+	uint32_t vector_relay_table_addr = (uint32_t)&__vector_relay_table;
+	uint32_t vector_relay_handler_func = (uint32_t)&__vector_relay_handler;
+
+	/* Verify that the vector relay table entries (except first two
+	 * entries for MSP and ResetHandler) point to the relay handling
+	 * function.
+	 */
+	const uint32_t *vector_relay_table_addr_val =
+		(uint32_t *)(vector_relay_table_addr);
+
+	for (int i = 2; i < 16 + CONFIG_NUM_IRQS; i++) {
+		zassert_true(vector_relay_table_addr_val[i] ==
+			vector_relay_handler_func,
+			"vector relay table not pointing to the relay handler: 0x%x, 0x%x\n",
+			vector_relay_table_addr_val[i],
+			vector_relay_handler_func);
+	}
+
+#if defined(CONFIG_CPU_CORTEX_M_HAS_VTOR)
+
+	uint32_t vector_table_addr = (uint32_t)&_vector_table;
+
+	/* Verify that the forwarding vector table and the real
+	 * interrupt vector table respect the VTOR.TBLOFF alignment
+	 * requirements.
+	 */
+	uint32_t mask = MAX(128, POW2_CEIL(4 * (16 + CONFIG_NUM_IRQS))) - 1;
+
+	zassert_true(((vector_table_addr) & mask) == 0,
+		"vector table not properly aligned: 0x%x\n",
+		vector_table_addr);
+	zassert_true(((vector_relay_table_addr) & mask) == 0,
+		"vector relay table not properly aligned: 0x%x\n",
+		vector_relay_table_addr);
+
+	/* Verify that the VTOR points to the real vector table,
+	 * NOT the table that contains the forwarding function.
+	 */
+	zassert_true(SCB->VTOR == (uint32_t)_vector_start,
+		"VTOR not pointing to the real vector table\n");
+#else
+	/* If VTOR is not present then we already need to forward interrupts
+	 * before loading any child chain-loadable image.
+	 */
+	zassert_true(_vector_table_pointer == (uint32_t)_vector_start,
+		"vector table pointer not pointing to vector start, 0x%x, 0x%x\n",
+		_vector_table_pointer, _vector_start);
+#endif
+}
+/**
+ * @}
+ */

tests/arch/arm/arm_sw_vector_relay/src/main.c

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+/*
+ * Copyright (c) 2020 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#if !defined(CONFIG_CPU_CORTEX_M)
+  #error test can only run on Cortex-M MCUs
+#endif
+
+#include <ztest.h>
+
+extern void test_arm_sw_vector_relay(void);
+
+void test_main(void)
+{
+	ztest_test_suite(arm_sw_vector_relay,
+		ztest_unit_test(test_arm_sw_vector_relay));
+	ztest_run_test_suite(arm_sw_vector_relay);
+}

tests/arch/arm/arm_sw_vector_relay/testcase.yaml

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+tests:
+  arch.arm.sw_vector_relay:
+    filter: CONFIG_ARMV6_M_ARMV8_M_BASELINE or CONFIG_ARMV7_M_ARMV8_M_MAINLINE
+    tags: arm
+    arch_whitelist: arm