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drivers: led_strip: ws2812_gpio: Add support for nRF52 SOC #147197

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drivers: led_strip: ws2812_gpio: Add support for nRF52 SOC

drivers: led_strip: ws2812_gpio: Add support for nRF52 SOC #147197

Re-run triggered September 3, 2024 23:47
@soburisoburi
#72050
chaim-zax:nrf52_support_for_ws2812_gpio_driver
Status Success
Total duration 2m 26s
Artifacts 1

compliance.yml

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1 error, 1 warning, and 1 notice
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Process completed with exit code 1.
Run compliance checks on patch series (PR): ClangFormat.txt#L1
See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details. You may want to run clang-format on this change: -#define NOPS(i, _) "nop\n" +#define NOPS(i, _) "nop\n" #define NOP_N_TIMES(n) LISTIFY(n, NOPS, ()) /* Send out a 1 bit's pulse */ -#define ONE_BIT(base, pin) do { \ - __asm volatile (SET_HIGH \ - NOP_N_TIMES(CONFIG_DELAY_T1H) \ - SET_LOW \ - NOP_N_TIMES(CONFIG_DELAY_T1L) \ - :: \ - [r] "l" (base), \ - [p] "l" (pin)); } while (false) +#define ONE_BIT(base, pin) \ + do { \ + __asm volatile(SET_HIGH NOP_N_TIMES(CONFIG_DELAY_T1H) \ + SET_LOW NOP_N_TIMES(CONFIG_DELAY_T1L)::[r] "l"(base), \ + [p] "l"(pin)); \ + } while (false) /* Send out a 0 bit's pulse */ -#define ZERO_BIT(base, pin) do { \ - __asm volatile (SET_HIGH \ - NOP_N_TIMES(CONFIG_DELAY_T0H) \ - SET_LOW \ - NOP_N_TIMES(CONFIG_DELAY_T0L) \ - :: \ - [r] "l" (base), \ - [p] "l" (pin)); } while (false) +#define ZERO_BIT(base, pin) \ + do { \ + __asm volatile(SET_HIGH NOP_N_TIMES(CONFIG_DELAY_T0H) \ + SET_LOW NOP_N_TIMES(CONFIG_DELAY_T0L)::[r] "l"(base), \ + [p] "l"(pin)); \ + } while (false) File:drivers/led_strip/ws2812_gpio.c Line:75
You may want to run clang-format on this change: drivers/led_strip/ws2812_gpio.c#L75
drivers/led_strip/ws2812_gpio.c:75 -#define NOPS(i, _) "nop\n" +#define NOPS(i, _) "nop\n" #define NOP_N_TIMES(n) LISTIFY(n, NOPS, ()) /* Send out a 1 bit's pulse */ -#define ONE_BIT(base, pin) do { \ - __asm volatile (SET_HIGH \ - NOP_N_TIMES(CONFIG_DELAY_T1H) \ - SET_LOW \ - NOP_N_TIMES(CONFIG_DELAY_T1L) \ - :: \ - [r] "l" (base), \ - [p] "l" (pin)); } while (false) +#define ONE_BIT(base, pin) \ + do { \ + __asm volatile(SET_HIGH NOP_N_TIMES(CONFIG_DELAY_T1H) \ + SET_LOW NOP_N_TIMES(CONFIG_DELAY_T1L)::[r] "l"(base), \ + [p] "l"(pin)); \ + } while (false) /* Send out a 0 bit's pulse */ -#define ZERO_BIT(base, pin) do { \ - __asm volatile (SET_HIGH \ - NOP_N_TIMES(CONFIG_DELAY_T0H) \ - SET_LOW \ - NOP_N_TIMES(CONFIG_DELAY_T0L) \ - :: \ - [r] "l" (base), \ - [p] "l" (pin)); } while (false) +#define ZERO_BIT(base, pin) \ + do { \ + __asm volatile(SET_HIGH NOP_N_TIMES(CONFIG_DELAY_T0H) \ + SET_LOW NOP_N_TIMES(CONFIG_DELAY_T0L)::[r] "l"(base), \ + [p] "l"(pin)); \ + } while (false)

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