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[WIP] dialects (arm): add cf instructions #3744
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then_block = successor_def() | ||
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assembly_format = ( |
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I'm aware that this is not correct, but I'm not sure how exactly to fix it. In arm, beq
must follow a cmp
in the line beforehand. (Related question: Shall I still treat is as one instruction and just include the cmp
in the printing, or implement cmp separately?)
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I think I'd add the cmp
separately and have a verification check here in beq
the enforces this constraint (i.e., the cmp
must be the instruction prior to this), similarly to some of the verify_
methods in the RISC-V dialect.
We don't have many there and the constraints are a bit more involved, but you should get an idea.
Let me know if you have more questions on this.
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I'm not 100% sure, if the constraint is so hard-coded, then maybe we could get away with a single op. Probably worth a discussion.
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Well, it depends on the CPSR AFAIU, and I'm not sure how to model that fully, e.g., when these are cleared, as the specification phrases this as "set by the last flag-setting instruction... etc.". For example, the cmp
instruction sets the Z flag.
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Overall looks good, I left some comments. I expect the Label op and attribute PRs to go in first, which would simplify this one.
Maybe also rename the PR title to be the specific control flow instruction that you intend to add here?
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then_block = successor_def() | ||
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assembly_format = ( |
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I think I'd add the cmp
separately and have a verification check here in beq
the enforces this constraint (i.e., the cmp
must be the instruction prior to this), similarly to some of the verify_
methods in the RISC-V dialect.
We don't have many there and the constraints are a bit more involved, but you should get an idea.
Let me know if you have more questions on this.
thanks for the review @compor. This was my initial attempt at adding support for CF but I felt it was getting a bit too long for a single PR, so I pushed it as a WIP branch so I could get some feedback. I'm planning to break it up into a couple of smaller PRs, so I'll probably end up cutting this down/deleting it afterwards |
Excellent @emmau678, no objection. Happy to hear and discuss your thoughts on the above discussion on the |
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Left some comment but not 100% they are very useful
// RUN: XDSL_GENERIC_ROUNDTRIP | ||
// RUN: xdsl-opt -t arm-asm %s | filecheck %s --check-prefix=CHECK-ASM | ||
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module { |
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It surprises me that this verifies, as ModuleOp
is tagged as being single_block
@@ -8,7 +8,7 @@ | |||
from xdsl.dialects.builtin import ModuleOp | |||
from xdsl.ir import Dialect | |||
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from .ops import ARMOperation, DSMovOp, DSSMulOp, GetRegisterOp | |||
from .ops import ARMOperation, DSMovOp, DSSMulOp, GetRegisterOp, LabelOp |
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Feels like this could be its own PR
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this is actually its own PR now (#3749), and I think all of your other comments are resolved in that one. apologies for the confusion, I will clearly mark WIP PRs from now on
AssemblyInstructionArg: TypeAlias = SSAValue | ||
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@irdl_attr_definition | ||
class LabelAttr(Data[str]): |
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Why not just use a StringAttr here?
label = attr_def(LabelAttr) | ||
comment = opt_attr_def(StringAttr) | ||
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assembly_format = "attr-dict" |
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Should this not have label
in it somewhere?
""" | ||
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name = "arm.label" | ||
label = attr_def(LabelAttr) |
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any reason this isn't a property?
@alexarice, thanks for the review also! this was very much a WIP when I pushed it and I have since done a smaller PR as a first step LabelOp. I'm planning to build on this incrementally in further PRs. I have updated the PR description and will do this next time if I push a WIP PR |
We tend to use [WIP] in the PR title to mark PRs as such |
Add control flow instructions for ARM (same as those already implemented for riscv).
Please note: Not ready for review, this is a WIP branch. I will break this up into smaller PRs and eventually delete this one