added bounds check for forced primitive site #20

Job	Run time
Run-tests (vtr_reg_nightly_test1, 16)	2h 13m 56s
Run-tests (vtr_reg_nightly_test1_odin, 16, -DWITH_ODIN=ON)	3h 1m 2s
Run-tests (vtr_reg_nightly_test2, 16)	3h 40m 46s
Run-tests (vtr_reg_nightly_test2_odin, 16, -DWITH_ODIN=ON)	3h 40m 20s
Run-tests (vtr_reg_nightly_test3, 16)	1h 50m 48s
Run-tests (vtr_reg_nightly_test3_odin, 16, -DWITH_ODIN=ON)	3h 30m 55s
Run-tests (vtr_reg_nightly_test4, 16)	3h 0m 32s
Run-tests (vtr_reg_nightly_test4_odin, 16, -DWITH_ODIN=ON)	1h 15m 54s
Run-tests (vtr_reg_nightly_test5, 16)	2h 54m 36s
Run-tests (vtr_reg_nightly_test6, 16)	3h 39m 27s
Run-tests (vtr_reg_nightly_test7, 16)	44m 43s
Run-tests (vtr_reg_strong, 16, -DVTR_ASSERT_LEVEL=3, libeigen3-dev)	15m 22s
Run-tests (vtr_reg_strong_odin, 16, -DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON, libeigen3-dev)	20m 25s
Run-tests (vtr_reg_strong_odin, 16, -skip_qor, -DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWI...	1h 9m 58s
Run-tests (vtr_reg_system_verilog, 16, -DYOSYS_F4PGA_PLUGINS=ON)	23m 19s
Run-tests (odin_reg_strong, 16, -DWITH_ODIN=ON)	1h 0m 43s
Run-tests (parmys_reg_strong, 16, -DYOSYS_F4PGA_PLUGINS=ON)	2h 43m 22s
	1d 11h 26m 8s

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