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This adds RISC-V into the build system enabling the following targets: - riscv32-softmmu - riscv64-softmmu - riscv32-linux-user - riscv64-linux-user This adds defaults configs for RISC-V, enables the build for the RISC-V CPU core, hardware, and Linux User Emulation. The 'qemu-binfmt-conf.sh' script is updated to add the RISC-V ELF magic. Expected checkpatch errors for consistency reasons: ERROR: line over 90 characters FILE: scripts/qemu-binfmt-conf.sh Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
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# Default configuration for riscv-linux-user |
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# Default configuration for riscv-softmmu | ||
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CONFIG_SERIAL=y | ||
CONFIG_VIRTIO=y |
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# Default configuration for riscv-linux-user |
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# Default configuration for riscv-softmmu | ||
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CONFIG_SERIAL=y | ||
CONFIG_VIRTIO=y |
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obj-y += riscv_htif.o | ||
obj-y += riscv_hart.o | ||
obj-y += sifive_e.o | ||
obj-y += sifive_clint.o | ||
obj-y += sifive_prci.o | ||
obj-y += sifive_plic.o | ||
obj-y += sifive_test.o | ||
obj-y += sifive_u.o | ||
obj-y += sifive_uart.o | ||
obj-y += spike.o | ||
obj-y += virt.o |
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obj-y += translate.o op_helper.o helper.o cpu.o fpu_helper.o gdbstub.o pmp.o |