DDS implemented on the Zynq RFSoC with sampling clock of 6.88 GHz
-
Updated
Oct 6, 2024 - Tcl
DDS implemented on the Zynq RFSoC with sampling clock of 6.88 GHz
Add a description, image, and links to the real-digital topic page so that developers can more easily learn about it.
To associate your repository with the real-digital topic, visit your repo's landing page and select "manage topics."