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cpld

Here are 15 public repositories matching this topic...

andykarpov / karabas-128

Karabas-128. ZX Spectrum 128k clone, based on CPLD Altera EPM7128STC100

spectrum clone vhdl zx cpld karabas 128

Updated Oct 9, 2024
VHDL

susam / mano-cpu

My bachelor's degree final year project: A CPLD implementation of a 16-bit microprocessor I learnt from Computer System Architecture by M. Morris Mano

electronics vhdl microprocessor cpld integrated-circuits

Updated Oct 1, 2020
VHDL

PreyMa / ScreenBuffer

LED Wall Screen Buffer and Panel Management Controller in VHDL

Updated Nov 4, 2018
VHDL

pdsmart / MZ80A_80COLOUR

A Sharp MZ80A Video upgrade. v1.0 allows switchable 40/80 column display with colour monitor output, v2.0 provides full pixel graphics compatible with the MZ80B.

fpga electronics vhdl kicad cpld mz80a

Updated Sep 4, 2022
VHDL

aelfimow / frequency-counter-2

Frequency counter implemented with CPLD EPM3064 only and HDSP-2113 display

display cpld frequency-counter self-made epm3064 hdsp-2113

Updated Aug 27, 2017
VHDL

snwjas / DE2-6bit-CPU

6位简易处理器的硬件设计，使用VHDL语言开发，在DE2-115开发板上运行通过。

fpga vhdl eda cpld de2-115

Updated Jun 10, 2021
VHDL

maciejstanek / cpld-epm240

Altera EPM240 playground

vhdl cpld epm240

Updated Jan 22, 2019
VHDL

hyiger / ram_rom_brd

RAM and ROM board expansion for the MAXV DeltaBrd

intel altera kicad cpld

Updated Aug 6, 2019
VHDL

meurissemax / elen0040-1

A small game written in VHDL implemented on a CPLD.

vhdl cpld

Updated Apr 20, 2019
VHDL

aelfimow / digit-clock

My digital clock with Altera's CPLD EPM3064 and 8 digits 7-segment display hh:mm:ss.ds

display 7-segment digital-clock cpld self-made epm3064

Updated Aug 27, 2017
VHDL

MKme / fpga

FPGA and CPLD programming, tutorials and information I figure out.

fpga verilog altera cpld altera-fpga

Updated Feb 20, 2022
VHDL

dmhl / max7219

MAX7219 7-segment 8-digit LED driver for FPGA/CPLD written in VHDL with cascade connected modules support

fpga max7219 vhdl cpld

Updated Sep 6, 2020
VHDL

MasterERTS / embel-calculator

Calculator on FPGA

fpga vhdl cpld fpga-programming

Updated Dec 11, 2019
VHDL

pat-pgt / Two-and-three-phases-generator

VHDL code to generate 2 or 3 phases low precision signals with high frequency master clock

digital vhdl logic-gates cpld triphase biphase

Updated Nov 14, 2024
VHDL

KNChiu / VHDL

The project that make by VHDL

fpga vhdl cpld

Updated Feb 28, 2019
VHDL

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