hal: telink: tl721x: update HAL for PM

- add PWM module into build for each app. - add blc_ll_initPowerManagement_module for PM. - add API definition to avoid build warnings and errors. - update BLE lib for PM. - add exit latency mechanism. Signed-off-by: Haiwen Xia <haiwen.xia@telink-semi.com>
telink-semi · Jan 16, 2025 · 62edeab · 62edeab
1 parent 9576bc0
commit 62edeab
Show file tree

Hide file tree

Showing 8 changed files with 40 additions and 9 deletions.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -17,7 +17,11 @@ zephyr_link_libraries(${CMAKE_CURRENT_SOURCE_DIR}/zephyr/blobs/lib_zephyr_b95.a)
 elseif (CONFIG_SOC_RISCV_TELINK_TL321X)
 zephyr_link_libraries(${CMAKE_CURRENT_SOURCE_DIR}/zephyr/blobs/lib_zephyr_tl321x.a)
 elseif (CONFIG_SOC_RISCV_TELINK_TL721X)
+	if(CONFIG_PM)
+zephyr_link_libraries(${CMAKE_CURRENT_SOURCE_DIR}/zephyr/blobs/lib_zephyr_tl721x_pm.a)
+	else()
 zephyr_link_libraries(${CMAKE_CURRENT_SOURCE_DIR}/zephyr/blobs/lib_zephyr_tl721x.a)
+	endif()
 else()
 	message( FATAL_ERROR "Not supported SOC" )
 endif()

diff --git a/tlsr9/CMakeLists.txt b/tlsr9/CMakeLists.txt
@@ -93,7 +93,7 @@ if(CONFIG_GPIO_TELINK_B9X OR CONFIG_GPIO_TELINK_TLX)
 endif()
 
 # PWM driver reference sources
-if(CONFIG_PWM_TELINK_B9X OR CONFIG_PWM_TELINK_TLX)
+if(CONFIG_PWM_TELINK_B9X OR CONFIG_PWM_TELINK_TLX OR CONFIG_SOC_RISCV_TELINK_TL721X)
 	zephyr_library_sources(drivers/${SOC}/pwm.c)
 endif()
 

diff --git a/tlsr9/ble/stack/ble/TL321X/controller/ll/ll_stack.h b/tlsr9/ble/stack/ble/TL321X/controller/ll/ll_stack.h
@@ -2146,7 +2146,8 @@ typedef struct {
 
     u32     appWakeup_tick;
 
-
+    u32     suspend_exitLatencyTick;
+    u32     deepret_exitLatencyTick;
 
 
     sch_task_t  *pTask_wakeup;

diff --git a/tlsr9/ble/stack/ble/TL721X/os_sup/os_sup.h b/tlsr9/ble/stack/ble/TL721X/os_sup/os_sup.h
@@ -74,4 +74,7 @@ void blc_ll_registerGiveSemCb(os_give_sem_t give_sem_from_isr, os_give_sem_t giv
  */
 void blc_ll_registerMutexSemCb(os_mutex_sem_t take_mutex_sem, os_mutex_sem_t give_mutex_sem);
 
+extern int blc_pm_handler(void);
+extern void blc_pm_setAppWakeupLowPower(u32 wakeup_tick, u8 enable);
+
 #endif /* OS_SUP_H_ */
diff --git a/tlsr9/ble/vendor/controller/tlx/tlx_bt_init.c b/tlsr9/ble/vendor/controller/tlx/tlx_bt_init.c
@@ -66,6 +66,15 @@ _attribute_ble_data_retention_ u8
 
 #endif /* CONFIG_TL_BLE_CTRL_PER_ADV */
 
+/** a temporary method to set exit latency which can be set in header files */
+#if CONFIG_SOC_RISCV_TELINK_TL321X
+	#define SUSPEND_EXIT_LATENCY_US		(200U)
+	#define DEEPRETN_EXIT_LATENCY_US	(1000U)		/*!< Not used for now */
+#elif CONFIG_SOC_RISCV_TELINK_TL721X
+	#define SUSPEND_EXIT_LATENCY_US		(250U)
+	#define DEEPRETN_EXIT_LATENCY_US	(0U)		/*!< Not used for now */
+#endif
+
 /**
  * @brief       Telink TLX BLE Controller initialization
  * @param[in]   prx - HCI RX callback
@@ -202,11 +211,17 @@ int tlx_bt_blc_init(void *prx, void *ptx)
 #ifdef CONFIG_PM
 	/* Enable PM for BLE stack */
 	blc_ll_enOsPowerManagement_module();
-
+	blc_ll_initPowerManagement_module();
 	/* Enable the sleep masks for BLE stack thread */
 	blc_pm_setSleepMask(PM_SLEEP_LEG_ADV | PM_SLEEP_LEG_SCAN | PM_SLEEP_ACL_SLAVE |
 			    PM_SLEEP_ACL_MASTER);
+	#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X
+	extern void blc_ll_setOsLowPowerExitLatencyUs(uint32_t suspendUs, uint32_t deepretUs);
+	blc_ll_setOsLowPowerExitLatencyUs(SUSPEND_EXIT_LATENCY_US, DEEPRETN_EXIT_LATENCY_US);
+	#endif
 #endif /* CONFIG_PM */
 
+
+
 	return INIT_OK;
 }
diff --git a/tlsr9/common/tl_sleep.c b/tlsr9/common/tl_sleep.c
@@ -28,7 +28,7 @@
 #elif CONFIG_SOC_RISCV_TELINK_TL321X
 #include <stack/ble/TL321X/controller/os_sup.h>
 #elif CONFIG_SOC_RISCV_TELINK_TL721X
-#include <stack/ble/TL721X/controller/os_sup/os_sup.h>
+#include <stack/ble/TL721X/os_sup/os_sup.h>
 #endif
 #include <tl_rf_power.h>
 #endif /* CONFIG_BT_B9X || CONFIG_BT_TLX */
@@ -88,7 +88,7 @@ CONFIG_SOC_SERIES_RISCV_TELINK_TLX_RETENTION)
 #elif CONFIG_SOC_RISCV_TELINK_TL321X
 #define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW96K
 #elif CONFIG_SOC_RISCV_TELINK_TL721X
-#define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW96K
+#define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW128K
 #endif
 
 bool tl_deep_sleep(uint32_t wake_stimer_tick)

diff --git a/tlsr9/drivers/TL721X/ext_driver/ext_pm.h b/tlsr9/drivers/TL721X/ext_driver/ext_pm.h
@@ -52,7 +52,7 @@
  */
 typedef int (*cpu_pm_handler_t)(pm_sleep_mode_e sleep_mode,  pm_sleep_wakeup_src_e wakeup_src, unsigned int  wakeup_tick);
 extern  cpu_pm_handler_t            cpu_sleep_wakeup;
-
+#define cpu_sleep_wakeup_32k_rc cpu_sleep_wakeup
 
 /**
  * @brief   deepsleep wakeup by external xtal

diff --git a/zephyr/module.yml b/zephyr/module.yml
@@ -36,9 +36,17 @@ blobs:
     description: "Binary libraries supporting Telink TL321X series BLE subsystems"
 
   - path: lib_zephyr_tl721x.a
-    sha256: 645d1f948a70fa70f0f977c32390ad98ff458c8c0d29ca9eb7f1311b90867799
+    sha256: a6342d12bebf83bdf64ca10ed4c9584be93bd5e453a18c35b40da4586951deea
     type: lib
     version: 'V4.0.4.2-c8c196e0'
     license-path: tlsr9/ble/license.txt
-    url: http://wiki.telink-semi.cn/wiki/protocols/Zephyr/binaries/public/tl721x_lib/lib_zephyr_tl721x_404e51e546195e114e4780b69956fe43f635c4f5.a
-    description: "Binary libraries supporting Telink TL721X series BLE subsystems"
+    url: http://wiki.telink-semi.cn/wiki/protocols/Zephyr/binaries/public/tl721x_lib/lib_zephyr_tl721x_7ef590e35c305bc8089d34aa26461ff077f068a4.a
+    description: "Binary libraries supporting Telink TL721X series BLE subsystems"
+
+  - path: lib_zephyr_tl721x_pm.a
+    sha256: 50a1b6950e896bafc798fcaf6e67efab708af8cd7eb5f4fcf9499b9ff04304b9
+    type: lib
+    version: 'V4.0.4.2-c8c196e0'
+    license-path: tlsr9/ble/license.txt
+    url: http://wiki.telink-semi.cn/wiki/protocols/Zephyr/binaries/public/tl721x_lib/lib_zephyr_tl721x_7ef590e35c305bc8089d34aa26461ff077f068a4_pm.a
+    description: "Binary libraries supporting Telink TL721X series BLE subsystems, optimized for low-power mode"