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[sfp] Ignore processing ports that are not front-panel
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Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
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vivekrnv committed Mar 19, 2024
1 parent 56921d8 commit bf81e9e
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Showing 4 changed files with 81 additions and 12 deletions.
12 changes: 6 additions & 6 deletions sonic_platform_base/sonic_sfp/sfputilbase.py
Original file line number Diff line number Diff line change
Expand Up @@ -14,8 +14,7 @@

from natsort import natsorted
from portconfig import get_port_config
from sonic_py_common import device_info
from sonic_py_common.interface import backplane_prefix, inband_prefix, recirc_prefix
from sonic_py_common import device_info, multi_asic

from sonic_eeprom import eeprom_dts
from .sff8472 import sff8472InterfaceId # Dot module supports both Python 2 and Python 3 using explicit relative import methods
Expand Down Expand Up @@ -434,11 +433,12 @@ def read_porttab_mappings(self, porttabfile, asic_inst=0):
print('Failed to get port config', file=sys.stderr)
sys.exit(1)
else:
logical_list = []
for intf in ports.keys():
logical_list.append(intf)
# Ignore if this is a non front panel interface
if multi_asic.is_front_panel_port(intf, ports[intf].get(multi_asic.PORT_ROLE, None)):
logical.append(intf)

logical = natsorted(logical_list, key=lambda y: y.lower())
logical = natsorted(logical, key=lambda y: y.lower())
logical_to_bcm, logical_to_physical, physical_to_logical = OrderedDict(), OrderedDict(), OrderedDict()

for intf_name in logical:
Expand Down Expand Up @@ -499,7 +499,7 @@ def read_porttab_mappings(self, porttabfile, asic_inst=0):
portname = line.split()[0]

# Ignore if this is an internal backplane interface and Inband interface
if portname.startswith((backplane_prefix(), inband_prefix(), recirc_prefix())):
if not multi_asic.is_front_panel_port(portname):
continue

bcm_port = str(port_pos_in_file)
Expand Down
9 changes: 3 additions & 6 deletions sonic_platform_base/sonic_sfp/sfputilhelper.py
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,6 @@
from natsort import natsorted
from portconfig import get_port_config
from sonic_py_common import device_info, multi_asic
from sonic_py_common.interface import backplane_prefix, inband_prefix, recirc_prefix

except ImportError as e:
raise ImportError("%s - required module not found" % str(e))
Expand Down Expand Up @@ -66,13 +65,11 @@ def read_porttab_mappings(self, porttabfile, asic_inst=0):
print('Failed to get port config', file=sys.stderr)
sys.exit(1)

logical_list = []
for intf in ports.keys():
logical_list.append(intf)
# Ignore if this is a non front panel interface
if multi_asic.is_front_panel_port(intf, ports[intf].get(multi_asic.PORT_ROLE, None)):
logical.append(intf)

# Ignore if this is an internal backplane interface and Inband interface
logical = [name for name in logical_list
if not name.startswith((backplane_prefix(), inband_prefix(), recirc_prefix()))]
logical = natsorted(logical, key=lambda y: y.lower())
logical_to_physical, physical_to_logical = OrderedDict(), OrderedDict()

Expand Down
46 changes: 46 additions & 0 deletions tests/platform_json/hwsku_role.json
Original file line number Diff line number Diff line change
@@ -0,0 +1,46 @@
{
"interfaces": {
"Ethernet0": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet4": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet8": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet12": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet16": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet20": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet24": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet28": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet32": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet36": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]"
},
"Ethernet40": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]",
"role": "Ext"
},
"Ethernet44": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]",
"role": "Int"
},
"Ethernet48": {
"default_brkout_mode": "1x200G[100G,50G,40G,25G,10G,1G]",
"role": "Dpc"
}
}
}
26 changes: 26 additions & 0 deletions tests/sfputilhelper_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,20 @@
"Ethernet48"
]

PORT_FILTERED_LIST = [
"Ethernet0",
"Ethernet4",
"Ethernet8",
"Ethernet12",
"Ethernet16",
"Ethernet20",
"Ethernet24",
"Ethernet28",
"Ethernet32",
"Ethernet36",
"Ethernet40",
]

LOGICAL_TO_PHYSICAL ={
'Ethernet0': [1],
'Ethernet4': [2],
Expand Down Expand Up @@ -56,6 +70,7 @@

test_dir = os.path.dirname(os.path.realpath(__file__))
hwsku_json_file = os.path.join(test_dir, 'platform_json', 'hwsku.json')
hwsku_role_json_file = os.path.join(test_dir, 'platform_json', 'hwsku_role.json')

@pytest.fixture(scope="class")
def setup_class(request):
Expand Down Expand Up @@ -118,3 +133,14 @@ def test_read_all_port_mappings(self):

assert sfputil_helper.logical_to_physical == LOGICAL_TO_PHYSICAL
assert sfputil_helper.physical_to_logical == PHYSICAL_TO_LOGICAL

@mock.patch('portconfig.get_hwsku_file_name', mock.MagicMock(return_value=hwsku_role_json_file))
def test_read_all_port_mappings_role(self):
sfputil_helper = sfputilhelper.SfpUtilHelper()
sfputil_helper.logical = []
sfputil_helper.logical_to_physical = {}
sfputil_helper.physical_to_logical = {}
sfputil_helper.read_all_porttab_mappings(self.platform_json_dir, 2)
logical_port_list = sfputil_helper.logical

assert len(logical_port_list) == len(PORT_FILTERED_LIST)

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