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[Ragile]: Add new centec platform ra-b6010 (#14819)
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What I did it
Add new platform arm64-ragile_ra-b6010-48gt4x-r0 (Centec)
ASIC Vendor: Centec
Switch ASIC: Centec
Port Config: 48x1G+4x10G

Why I did it
Add new platform RA-B6010-48GT4X

How I did it
Add new platform RA-B6010-48GT4X

Signed-off-by: pettershao-ragilenetworks <pettershao@ragilenetworks.com>
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pettershao-ragilenetworks authored Aug 31, 2023
1 parent 2a48406 commit 7506243
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868 changes: 868 additions & 0 deletions device/ragile/arm64-ragile_ra-b6010-48gt4x-r0/RA-B6010-48GT4X/RA-b6010-48gt4x-board.json
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96 changes: 96 additions & 0 deletions ...ragile/arm64-ragile_ra-b6010-48gt4x-r0/RA-B6010-48GT4X/RA-b6010-48gt4x-p-chip-profile.txt
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#----------------- SDK Feature Support --------------
[MPLS_SUPPORT] = 1;
[APS_SUPPORT] = 1;
[OAM_SUPPORT] = 1;
[PTP_SUPPORT] = 0;
[SYNCE_SUPPORT] = 0;
[STACKING_SUPPORT] = 1;
[BPE_SUPPORT] = 0;
[IPFIX_SUPPORT] = 1;
[MONITOR_SUPPORT] = 1;
[OVERLAY_SUPPORT] = 1;
[EFD_SUPPORT] = 1;
[FCOE_SUPPORT] = 0;
[TRILL_SUPPORT] = 0;
[WLAN_SUPPORT] = 1;
[NPM_SUPPORT] = 1;
[DOT1AE_SUPPORT] = 1;

#----------------- Chip Init Parameter --------------
#Local chip number and global chip id
[Local chip_num] = 1
[Local chip0] = 0
[Local chip1] = 1

#Cut through mode 0: Disable; 1:10/40/100G; 2:1/10/100G; 3:1/10/40G; other:Flex, refer to CUT_THROUGH_BITMAP
[CUT_THROUGH_SPEED] = 0
#Flex cut through mode, speed enable by bitmap, refer to ctc_port_speed_t, Notice: 10M/100M/1G treat as the same speed
[CUT_THROUGH_BITMAP] = 0

#Network cpu port
[CPU_NETWORK_PORT_EN] = 0
[CPU_NETWORK_PORT_ID] = 47

#Enable parity error and multi-bit ecc recover
[ECC_RECOVER_EN] = 0
[TCAM_SCAN_EN] = 0

#----------------- Interrupt Init Parameter --------------
#0: pin, 1: msi
[Interrupt_mode] = 0
[IRQ] = 69

#----------------- NextHop Init Parameter --------------
#0: SDK work in pizzbox (single chip system), 1: SDK work in multi-chip system
[Nexthop Edit Mode] = 0
[External Nexthop Number] = 16384
[MPLS Tunnel Number] = 1024

#----------------- L2 Init Parameter --------------
[FDB Hw Learning] = 1
[Logic Port Num] = 1024
#0: 128 instance per port, 1: 64 instance per port, 2: 32 instance per port
[STP MODE] = 0
[MAX_FID_NUM] = 5120

#----------------- Stats Init Parameter --------------
[STATS_PORT_EN] = 0
[STATS_ECMP_EN] = 0

#----------------- BPE Init Parameter --------------
[BPE_BR_PORT_EXTENDER_EN] = 0
[BPE_BR_UC_MAX_ECID] = 1024
[BPE_BR_MC_MAX_ECID] = 4096
[BPE_BR_PORT_BASE] = 0

#----------------- Ipuc Init Parameter --------------
#0: tcam use prefix 16; 1: tcam use prefix 8
[IPUC_TCAM_PREFIX_8] = 1

#----------------- QoS Init Parameter --------------
#QoS policer number support 1K/2K/4K/8K, default 4K
[QOS_POLICER_NUM] = 4096
#QoS port queue number support 16/8/8 BPE/4 BPE,
#When resrc_profile.cfg exist, queue number valid,
#Default 8 queue mode
#8 queue = 8
#16 queue = 16
#4 queue BPE = 17
#8 queue BPE = 18
[QOS_PORT_QUEUE_NUM] = 8
#QoS port extend queue number support 0/4, default 0
[QOS_PORT_EXT_QUEUE_NUM] = 0
#QoS CPU reason queue number support 128/64/32, default 128
[QOS_CPU_QUEUE_NUM] = 128
[QOS_INGRESS_VLAN_POLICER_NUM] = 0
[QOS_EGRESS_VLAN_POLICER_NUM] = 0
[QOS_POLICER_MERGE_MODE] = 0
#QOS service queue mode, default 0,0:logic scr port + dstport enq 1:service id + dstport enq
[QOS_SERVICE_QUEUE_MODE] = 0
#Global enable logic dst port + dstport enq
[QOS_SERVICE_QUEUE_EGRESS_EN] = 0

#----------------- Stacking Init Parameter --------------
#0: normal mode; 1: spine-leaf mode
[FABRIC MODE] = 0
[STACKING VERSION] = 1
281 changes: 281 additions & 0 deletions device/ragile/arm64-ragile_ra-b6010-48gt4x-r0/RA-B6010-48GT4X/RA-b6010-48gt4x-p-datapath.txt
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#Generated by 'CTC DataPath Tools' on Fri Dec 18 19:15:31 2020
#Version 1.0, Supported by TsingMa SDK


#SERDES_MODE : 0-NONE, 1-XFI, 2-SGMII, 3-Not Support, 4-QSGMII, 5-XAUI, 6-DXAUI, 7-XLG, 8-CG, 9-SGMII2G5
# 10-USXGMII-S, 11-USXGMII-M2G5, 12-USXGMII-M5G, 13-XXVG, 14-LG, 15-100BASE-FX
#SERDES_RX_POLY: 0-Normal, 1-Inverse
#SERDES_SWITCH : 0-Not Support Dynamic Switch, 1-Support Dynamic Switch

[WLAN_ENABLE] = 1
[DOT1AE_ENABLE] = 1

[CORE_PLLA] = 600
#{
[SERDES_ITEM]
#repeat 32 step 6
[SERDES_ID] = 0
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 1
[SERDES_TX_POLY] = 1
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 1
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 2
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 1
[SERDES_TX_POLY] = 1
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 3
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 4
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 5
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 6
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 7
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 1
[SERDES_TX_POLY] = 1
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 8
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 1
[SERDES_TX_POLY] = 1
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 9
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 10
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 11
[SERDES_MODE] = 4
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 12
[SERDES_MODE] = 1
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 1
[SERDES_GROUP] = 0

[SERDES_ID] = 13
[SERDES_MODE] = 1
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 1
[SERDES_GROUP] = 0

[SERDES_ID] = 14
[SERDES_MODE] = 1
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 1
[SERDES_GROUP] = 0

[SERDES_ID] = 15
[SERDES_MODE] = 1
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 1
[SERDES_GROUP] = 0

[SERDES_ID] = 16
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 17
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 18
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 19
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 20
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 21
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 22
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 23
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 24
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 25
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 26
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 1

[SERDES_ID] = 27
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 1

[SERDES_ID] = 28
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 29
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 0

[SERDES_ID] = 30
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 1

[SERDES_ID] = 31
[SERDES_MODE] = 3
[SERDES_RX_POLY] = 0
[SERDES_TX_POLY] = 0
[SERDES_SWITCH] = 0
[SERDES_GROUP] = 1

#repeat end
#}


#[SERDES_TO_LPORT]
#{
# | QSGMII/USXGMII-M2G5 | USXGMII-M5G | USXGMII-S | 100BASE-FX | SGMII/SGMII2G5/XFI | XAUI/DXAUI | XLG | XXVG | LG | CG
#---------|---------------------|-------------|-----------|------------|--------------------|------------|-----|------|----|---
#serdes 0 |0 /1 /2 /3 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 1 |4 /5 /6 /7 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 2 |16/17/18/19 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 3 |20/21/22/23 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 4 |8 /9 /10/11 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 5 |32/33/34/35 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 6 |36/37/38/39 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 7 |40/41/42/43 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 8 |24/25/26/27 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 9 |48/49/50/51 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 10|52/53/54/55 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 11|56/57/58/59 |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 12|NA |NA |NA |12 |12 |12 |12 |NA |NA |NA
#serdes 13|NA |NA |NA |13 |13 |12 |12 |NA |NA |NA
#serdes 14|NA |NA |NA |14 |14 |12 |12 |NA |NA |NA
#serdes 15|NA |NA |NA |15 |15 |12 |12 |NA |NA |NA
#serdes 16|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 17|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 18|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 19|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 20|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 21|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 22|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 23|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 24|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 25|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 26|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 27|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 28|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 29|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 30|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#serdes 31|NA |NA |NA |NA |NA |NA |NA |NA |NA |NA
#}
1 change: 1 addition & 0 deletions device/ragile/arm64-ragile_ra-b6010-48gt4x-r0/RA-B6010-48GT4X/default_sku
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RA-B6010-48GT4X l1
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