ARM: dts: pixi-cx: assign CLK_PLL5_VIDEO_DIV as parent clock for LDB

Signed-off-by: Peter Fink <pfink@christ-es.de>
software-celo · Mar 4, 2020 · 11d1645 · 11d1645
1 parent ee2db8d
commit 11d1645
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/arch/arm/boot/dts/imx6qdl-pixi-cx.dtsi b/arch/arm/boot/dts/imx6qdl-pixi-cx.dtsi
@@ -96,8 +96,8 @@
 &clks {
 	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
-	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO>,
-				 <&clks IMX6QDL_CLK_PLL5_VIDEO>;
+	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
+				 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
 };
 
 &fec {