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Fix x86 compilation #376

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Jul 4, 2024
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24 changes: 8 additions & 16 deletions src/impls/avx2/deser.rs
Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
#[cfg(target_arch = "x86")]
use std::arch::x86::{
__m256i, _mm256_cmpeq_epi8, _mm256_loadu_si256, _mm256_movemask_epi8, _mm256_set1_epi8,
_mm256_storeu_si256,
};
use std::arch::x86 as arch;

#[cfg(target_arch = "x86_64")]
use std::arch::x86_64::{
use std::arch::x86_64 as arch;

use arch::{
__m256i, _mm256_cmpeq_epi8, _mm256_loadu_si256, _mm256_movemask_epi8, _mm256_set1_epi8,
_mm256_storeu_si256,
};
Expand Down Expand Up @@ -46,8 +46,7 @@ pub(crate) unsafe fn parse_str<'invoke, 'de>(
loop {
// _mm256_loadu_si256 does not require alignment
#[allow(clippy::cast_ptr_alignment)]
let v: __m256i =
_mm256_loadu_si256(src.as_ptr().add(src_i).cast::<std::arch::x86_64::__m256i>());
let v: __m256i = _mm256_loadu_si256(src.as_ptr().add(src_i).cast::<__m256i>());

// store to dest unconditionally - we can overwrite the bits we don't like
// later
Expand Down Expand Up @@ -97,18 +96,11 @@ pub(crate) unsafe fn parse_str<'invoke, 'de>(
loop {
// _mm256_loadu_si256 does not require alignment
#[allow(clippy::cast_ptr_alignment)]
let v: __m256i =
_mm256_loadu_si256(src.as_ptr().add(src_i).cast::<std::arch::x86_64::__m256i>());
let v: __m256i = _mm256_loadu_si256(src.as_ptr().add(src_i).cast::<__m256i>());

// _mm256_storeu_si256 does not require alignment
#[allow(clippy::cast_ptr_alignment)]
_mm256_storeu_si256(
buffer
.as_mut_ptr()
.add(dst_i)
.cast::<std::arch::x86_64::__m256i>(),
v,
);
_mm256_storeu_si256(buffer.as_mut_ptr().add(dst_i).cast::<__m256i>(), v);

// store to dest unconditionally - we can overwrite the bits we don't like
// later
Expand Down
38 changes: 23 additions & 15 deletions src/impls/avx2/stage1.rs
Original file line number Diff line number Diff line change
@@ -1,18 +1,16 @@
#![allow(dead_code)]
use crate::{static_cast_i32, static_cast_i64, static_cast_u32, Stage1Parse};
#[cfg(target_arch = "x86")]
use std::arch::x86::{
__m256i, _mm256_add_epi32, _mm256_and_si256, _mm256_cmpeq_epi8, _mm256_loadu_si256,
_mm256_max_epu8, _mm256_movemask_epi8, _mm256_set1_epi8, _mm256_set_epi32, _mm256_setr_epi8,
_mm256_setzero_si256, _mm256_shuffle_epi8, _mm256_srli_epi32, _mm256_storeu_si256,
_mm_clmulepi64_si128, _mm_cvtsi128_si64, _mm_set1_epi8, _mm_set_epi64x,
};
use std::arch::x86 as arch;

#[cfg(target_arch = "x86_64")]
use std::arch::x86_64::{
use std::arch::x86_64 as arch;

use arch::{
__m256i, _mm256_add_epi32, _mm256_and_si256, _mm256_cmpeq_epi8, _mm256_loadu_si256,
_mm256_max_epu8, _mm256_movemask_epi8, _mm256_set1_epi8, _mm256_set_epi32, _mm256_setr_epi8,
_mm256_setzero_si256, _mm256_shuffle_epi8, _mm256_srli_epi32, _mm256_storeu_si256,
_mm_clmulepi64_si128, _mm_cvtsi128_si64, _mm_set1_epi8, _mm_set_epi64x,
_mm_clmulepi64_si128, _mm_set1_epi8, _mm_set_epi64x,
};

macro_rules! low_nibble_mask {
Expand Down Expand Up @@ -56,14 +54,29 @@ impl Stage1Parse for SimdInput {
#[cfg_attr(not(feature = "no-inline"), inline)]
#[allow(clippy::cast_sign_loss)]
#[target_feature(enable = "avx2")]
#[cfg(target_arch = "x86_64")]
unsafe fn compute_quote_mask(quote_bits: u64) -> u64 {
_mm_cvtsi128_si64(_mm_clmulepi64_si128(
std::arch::x86_64::_mm_cvtsi128_si64(_mm_clmulepi64_si128(
_mm_set_epi64x(0, static_cast_i64!(quote_bits)),
_mm_set1_epi8(-1_i8 /* 0xFF */),
0,
)) as u64
}

#[cfg_attr(not(feature = "no-inline"), inline)]
#[allow(clippy::cast_sign_loss)]
#[target_feature(enable = "avx2")]
#[cfg(target_arch = "x86")]
unsafe fn compute_quote_mask(quote_bits: u64) -> u64 {
let mut quote_mask: u64 = quote_bits ^ (quote_bits << 1);
quote_mask = quote_mask ^ (quote_mask << 2);
quote_mask = quote_mask ^ (quote_mask << 4);
quote_mask = quote_mask ^ (quote_mask << 8);
quote_mask = quote_mask ^ (quote_mask << 16);
quote_mask = quote_mask ^ (quote_mask << 32);
quote_mask
}

/// a straightforward comparison of a mask against input
#[cfg_attr(not(feature = "no-inline"), inline)]
#[allow(clippy::cast_possible_wrap, clippy::cast_sign_loss)]
Expand Down Expand Up @@ -215,12 +228,7 @@ impl Stage1Parse for SimdInput {

let v: __m256i = _mm256_set_epi32(v7, v6, v5, v4, v3, v2, v1, v0);
let v: __m256i = _mm256_add_epi32(idx_64_v, v);
_mm256_storeu_si256(
base.as_mut_ptr()
.add(l)
.cast::<std::arch::x86_64::__m256i>(),
v,
);
_mm256_storeu_si256(base.as_mut_ptr().add(l).cast::<__m256i>(), v);
l += 8;
}
// We have written all the data
Expand Down
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