Pinned Loading

1. Conv2D_CFU Conv2D_CFU Public

   Conv2D acceleration using the framework CFU Playground

   Verilog 4 1

2. FPGA_Genome_Alignment FPGA_Genome_Alignment Public

   Hardware Acceleration of Banded Smith-Waterman Algorithm on an FPGA using Systolic array based architecture.

   Verilog 9 3

3. CS6600-Computer-Architecture CS6600-Computer-Architecture Public

   CS6600, Computer Architecture, Jul - Nov 2022

   C++

4. MNIST_picoRV32 MNIST_picoRV32 Public

   Hardware Acceleration of a 2-layer integer quantised Neural Network trained on MNIST dataset.

   Verilog 1 2

5. CS6023-GPU-Programming CS6023-GPU-Programming Public

   CS6023, GPU Programming, Jan - May 2022

   Cuda 1 1

6. EE2003-Computer-Organisation EE2003-Computer-Organisation Public

   EE2003, Computer Organisation, Jul - Nov 2021

   Verilog 1