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The SystemVerilog backend lets you write software for FPGA devices, this for the most extreme and high performance applications.
note: this backend is in development and still highly experimental.
You need to install the Icarus Verilog compiler. https://github.com/steveicarus/iverilog
https://github.com/rusthon/Rusthon/blob/master/examples/hello_verilog.md https://github.com/rusthon/Rusthon/blob/master/examples/verilog.md
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