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Complete the remaining neon instructions #1230

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merged 3 commits into from
Oct 21, 2021
Merged

Complete the remaining neon instructions #1230

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5f428b7
complete remaining neon instructions
SparrowLii Oct 15, 2021
dcd29ae
Eliminate duplication
SparrowLii Oct 15, 2021
e77e041
correct assert_instr
SparrowLii Oct 15, 2021
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14,024 changes: 8,909 additions & 5,115 deletions crates/core_arch/src/aarch64/neon/generated.rs
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37 changes: 36 additions & 1 deletion crates/core_arch/src/aarch64/neon/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -2985,7 +2985,24 @@ pub unsafe fn vsliq_n_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x
static_assert_imm4!(N);
transmute(vsliq_n_s16_(transmute(a), transmute(b), N))
}

/// Shift Left and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(test, assert_instr(sli, N = 1))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn vsli_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
static_assert!(N: i32 where N >= 0 && N <= 63);
transmute(vsli_n_s64_(transmute(a), transmute(b), N))
}
/// Shift Left and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(test, assert_instr(sli, N = 1))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn vsliq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
static_assert!(N: i32 where N >= 0 && N <= 63);
transmute(vsliq_n_s64_(transmute(a), transmute(b), N))
}
/// Shift Right and Insert (immediate)
#[inline]
#[target_feature(enable = "neon")]
Expand Down Expand Up @@ -3166,6 +3183,24 @@ pub unsafe fn vsriq_n_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x
static_assert!(N: i32 where N >= 1 && N <= 16);
transmute(vsriq_n_s16_(transmute(a), transmute(b), N))
}
/// Shift Right and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(test, assert_instr(sri, N = 1))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn vsri_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
static_assert!(N: i32 where N >= 1 && N <= 64);
transmute(vsri_n_s64_(transmute(a), transmute(b), N))
}
/// Shift Right and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,aes")]
#[cfg_attr(test, assert_instr(sri, N = 1))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn vsriq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
static_assert!(N: i32 where N >= 1 && N <= 64);
transmute(vsriq_n_s64_(transmute(a), transmute(b), N))
}

#[cfg(test)]
mod tests {
Expand Down
53 changes: 52 additions & 1 deletion crates/core_arch/src/arm/neon.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1047,7 +1047,32 @@ pub unsafe fn vsliq_n_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x
int16x8_t(n, n, n, n, n, n, n, n),
))
}

/// Shift Left and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,v7,aes")]
#[cfg_attr(test, assert_instr("vsli.64", N = 1))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn vsli_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
static_assert!(N : i32 where 0 <= N && N <= 63);
transmute(vshiftins_v1i64(
transmute(a),
transmute(b),
int64x1_t(N as i64),
))
}
/// Shift Left and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,v7,aes")]
#[cfg_attr(test, assert_instr("vsli.64", N = 1))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn vsliq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
static_assert!(N : i32 where 0 <= N && N <= 63);
transmute(vshiftins_v2i64(
transmute(a),
transmute(b),
int64x2_t(N as i64, N as i64),
))
}
/// Shift Right and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,v7")]
Expand Down Expand Up @@ -1292,6 +1317,32 @@ pub unsafe fn vsriq_n_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x
int16x8_t(n, n, n, n, n, n, n, n),
))
}
/// Shift Right and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,v7,aes")]
#[cfg_attr(test, assert_instr("vsri.64", N = 1))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn vsri_n_p64<const N: i32>(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
static_assert!(N : i32 where 1 <= N && N <= 64);
transmute(vshiftins_v1i64(
transmute(a),
transmute(b),
int64x1_t(-N as i64),
))
}
/// Shift Right and Insert (immediate)
#[inline]
#[target_feature(enable = "neon,v7,aes")]
#[cfg_attr(test, assert_instr("vsri.64", N = 1))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn vsriq_n_p64<const N: i32>(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
static_assert!(N : i32 where 1 <= N && N <= 64);
transmute(vshiftins_v2i64(
transmute(a),
transmute(b),
int64x2_t(-N as i64, -N as i64),
))
}

#[cfg(test)]
mod tests {
Expand Down
2 changes: 0 additions & 2 deletions crates/core_arch/src/arm_shared/crypto.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -51,8 +51,6 @@ extern "unadjusted" {
#[cfg(test)]
use stdarch_test::assert_instr;

// TODO: Use AES for ARM when the minimum LLVM version includes b8baa2a9132498ea286dbb0d03f005760ecc6fdb

/// AES single round encryption.
#[inline]
#[cfg_attr(not(target_arch = "arm"), target_feature(enable = "aes"))]
Expand Down
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