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rustc_target: don't limit SPIR-V inline asm! types to a fixed subset. #79171
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Original file line number | Diff line number | Diff line change | ||||
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@@ -137,14 +137,14 @@ macro_rules! types { | |||||
) => { | ||||||
{ | ||||||
use super::InlineAsmType::*; | ||||||
&[ | ||||||
super::InlineAsmSupportedTypes::OneOf(&[ | ||||||
$($( | ||||||
($ty, None), | ||||||
)*)? | ||||||
$($( | ||||||
($ty2, Some($feature)), | ||||||
)*)* | ||||||
] | ||||||
]) | ||||||
} | ||||||
}; | ||||||
} | ||||||
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@@ -389,12 +389,10 @@ impl InlineAsmRegClass { | |||||
} | ||||||
} | ||||||
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/// Returns a list of supported types for this register class, each with a | ||||||
/// options target feature required to use this type. | ||||||
pub fn supported_types( | ||||||
self, | ||||||
arch: InlineAsmArch, | ||||||
) -> &'static [(InlineAsmType, Option<&'static str>)] { | ||||||
/// Returns either `InlineAsmSupportedTypes::OneOf`, containing a list of | ||||||
/// supported types for this register class, each with an optional target | ||||||
/// feature required to use that type, or `InlineAsmSupportedTypes::Any`. | ||||||
pub fn supported_types(self, arch: InlineAsmArch) -> InlineAsmSupportedTypes { | ||||||
match self { | ||||||
Self::X86(r) => r.supported_types(arch), | ||||||
Self::Arm(r) => r.supported_types(arch), | ||||||
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@@ -473,6 +471,17 @@ impl fmt::Display for InlineAsmRegOrRegClass { | |||||
} | ||||||
} | ||||||
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/// Type constrains for a particular register class. | ||||||
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Suggested change
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#[derive(Copy, Clone, Debug, Eq, PartialEq)] | ||||||
pub enum InlineAsmSupportedTypes { | ||||||
/// Any type is allowed. | ||||||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Not exactly: this is still limited to primitive types and SIMD vectors. By the way, is SPIR-V able to handle more exotic types such as There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more.
For a general background: theoretically yes, integers are declared using an arbitrary bit width (like llvm), and the spec doesn't disallow (or even mention) 128 bit integers. Practically no, though, considering that there are extensions to enable support for 8 bit, 16 bit, and 64 bit integers, which implies no support for 128 bit considering there's no extension for it (the SPIR-V world is full of weird unsaid implications like this). However, I think in this case, 128 bit integers will either be disallowed outside
Yeah, we'd like to allow any type here, not sure if that's easiest to do in this PR or a follow-up (or if it's even possible to allow any type). It's certainly a little weird having an IR in There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. +1 to allowing aggregate |
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Any, | ||||||
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/// Only the listed types are supported, and each is paired with | ||||||
/// an optional target feature required to use that type. | ||||||
OneOf(&'static [(InlineAsmType, Option<&'static str>)]), | ||||||
} | ||||||
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/// Set of types which can be used with a particular register class. | ||||||
#[derive(Copy, Clone, Debug, Eq, PartialEq)] | ||||||
pub enum InlineAsmType { | ||||||
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We need to do this as part of the type-checking passes since we want to validate these before monomorphization.
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I meant specifically for the
Any
case. AFAIK SPIR-V should be able to handle anySized
value (similar to LLVM "first-class aggregrates" but even more first-class).