rustbuild: RISC-V is no longer an experimental LLVM target #63218
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This commit moves RISC-V from the experimental LLVM targets to the regular LLVM targets. RISC-V was made non-experimental in https://reviews.llvm.org/rL366399 I have also sorted the list of LLVM targets, and changed the code around setting llvm_exp_targets (and its default) to match the code setting llvm_targets (and its default), ensuring future changes to the defaults, as LLVM targets become stable, affect as few places as possible.
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Thanks for the pull request, and welcome! The Rust team is excited to review your changes, and you should hear from @alexcrichton (or someone else) soon. If any changes to this PR are deemed necessary, please add them as extra commits. This ensures that the reviewer can see what has changed since they last reviewed the code. Due to the way GitHub handles out-of-date commits, this should also make it reasonably obvious what issues have or haven't been addressed. Large or tricky changes may require several passes of review and changes. Please see the contribution instructions for more information. |
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Nice! While you're at it, mind removing the references to WebAssembly for experimental targets as well? That one has also been not experimental for a whole LLVM release :) |
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@bors: delegate+ Looks great to me! I think there's a tidy error with line length limits on CI though? |
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✌️ @lenary can now approve this pull request |
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Yeah, I see. I am still a little unfamiliar with the built tool, so still working out how to run rustfmt on my changes. |
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@bors: r+ That works :) |
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📌 Commit 2921de6 has been approved by |
…excrichton rustbuild: RISC-V is no longer an experimental LLVM target This moves RISC-V from the experimental LLVM targets to the regular LLVM targets. RISC-V was made non-experimental in https://reviews.llvm.org/rL366399 I have also sorted the list of LLVM targets, and changed the code around setting llvm_exp_targets (and its default) to match the code setting llvm_targets (and its default), ensuring future changes to the defaults, as LLVM targets become stable, affect as few places as possible. Given WebAssembly is in `LLVM_ALL_TARGETS` and is therefore built by default (and has been since October 2018), I'm not sure why rust still has it in `experimental-targets`. I'm happy to update this PR to move it into the main list of LLVM targets. r? @alexcrichton
Rollup of 5 pull requests Successful merges: - #62954 (Fix typo in Delimited::open_tt) - #63146 (Cleanup syntax::attr) - #63218 (rustbuild: RISC-V is no longer an experimental LLVM target) - #63227 (dead_code: Properly inspect fields in struct patterns with type relative paths) - #63229 (A bit of Miri error cleanup) Failed merges: r? @ghost
This moves RISC-V from the experimental LLVM targets to the
regular LLVM targets. RISC-V was made non-experimental in
https://reviews.llvm.org/rL366399
I have also sorted the list of LLVM targets, and changed the code
around setting llvm_exp_targets (and its default) to match the code
setting llvm_targets (and its default), ensuring future changes to
the defaults, as LLVM targets become stable, affect as few places as
possible.
Given WebAssembly is in
LLVM_ALL_TARGETSand is therefore built by default (and has been since October 2018), I'm not sure why rust still has it inexperimental-targets. I'm happy to update this PR to move it into the main list of LLVM targets.r? @alexcrichton