Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Mnemonic fixes #146

Merged
merged 2 commits into from
Mar 19, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion src/insns/cmv_16bit.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ Capability Mode Expansion::
cmv cd, cs2

Suggested assembly syntax::
`mv cd, cs2` +
`mv rd, rs2` +
`mv cd, cs2`

NOTE: the suggested assembly syntax distinguishes from integer `mv` by operand type.
Expand Down
2 changes: 1 addition & 1 deletion src/insns/wavedrom/amoswap_cap.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
....
{reg: [
{bits: 7, name: 'opcode', attr: ['7', 'AMO=0101111'], type: 8},
{bits: 5, name: 'rd', attr: ['5', 'rdest[4:0]'], type: 3},
{bits: 5, name: 'cd', attr: ['5', 'rdest[4:0]'], type: 3},
{bits: 3, name: 'funct3', attr: ['3', 'width', 'rv32: .C=011', 'rv64: .C=100'], type: 8},
{bits: 5, name: 'cs1', attr: ['5', 'base'], type: 4},
{bits: 5, name: 'cs2', attr: ['5', 'src'], type: 4},
Expand Down
Loading