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8 changes: 5 additions & 3 deletions specification/00-header.adoc
Original file line number Diff line number Diff line change
@@ -1,16 +1,18 @@
[[header]]
:description: RISC-V CoVE IO: Trusted IO proposal for RISC-V
:company: RISC-V.org
:revdate: 2023/04
:revdate: January 15, 2024
:revnumber: 0.1
:revremark: This document is in development. Assume everything can change. See http://riscv.org/spec-state for details.
:url-riscv: http://riscv.org
:doctype: book
:pdf-theme: ./docs-resources/themes/riscv-pdf.yml
:pdf-fontsdir: ./docs-resources/fonts
:preface-title: Preamble
:colophon:
:appendix-caption: Appendix
:imagesdir: .
:title-logo-image: image:images/risc-v_logo.svg[pdfwidth=3.25in,align=center]
:imagesdir: docs-resources/images
:title-logo-image: image:risc-v_logo.png[pdfwidth=3.25in,align=center]
// Settings:
:experimental:
:reproducible:
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2 changes: 1 addition & 1 deletion specification/02-intro.adoc
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Expand Up @@ -38,7 +38,7 @@ major performance impact for confidential workloads.

[[bounce_buffer]]
.Bounce buffering between an untrusted device and a CoVE TVM
image::images/bounce_buffer.svg[]
image::bounce_buffer.svg[]

As devices typically expose their programming interfaces through memory mapped
registers, using a shared memory buffer requires additional protection of the
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4 changes: 2 additions & 2 deletions specification/04-requirements.adoc
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Expand Up @@ -137,7 +137,7 @@ IDE keys to both the CoVE-IO device and its upstream PCIe Root Port.

[[coveio_hierarchy]]
.CoVE-IO PCIe Topology
image::images/coveio_hierarchy.svg[align="center"]
image::coveio_hierarchy.svg[align="center"]


===== IO Translation Agent
Expand Down Expand Up @@ -176,7 +176,7 @@ session.

[[IDE_KM_RPT]]
.PCIe Root Port IDE Key Management through Hardware Root-of-Trust
image::images/rp_rot_idekm.svg[align="center"]
image::rp_rot_idekm.svg[align="center"]

As a consequence, a CoVE-IO-compliant platform must have at least one PCIe
accessible HROT, with the following requirements:
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2 changes: 1 addition & 1 deletion specification/06-arch_overview.adoc
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Expand Up @@ -8,7 +8,7 @@ they interact together:

[[COVE_IO_ARCHITECTURE]]
.CoVE-IO High Level Architecture
image::images/cove-io-architecture.svg[align="center"]
image::cove-io-architecture.svg[align="center"]

The TEE Security Manager (TSM) orchestrates and manages TEE Virtual Machines
(TVM), as defined by the <<CoVE>> specification. The TSM operates in HS-Mode
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6 changes: 3 additions & 3 deletions specification/07-theory_operations.adoc
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Expand Up @@ -110,7 +110,7 @@ by the ROT.

[[IDE_KM_RPT_OP]]
.PCIe Root Port IDE Key Management through Hardware Root-of-Trust
image::images/rp_rot_idekm.svg[align="center"]
image::rp_rot_idekm.svg[align="center"]

=== SPDM Transport

Expand All @@ -120,7 +120,7 @@ machine.

[[spdm_message]]
.SPDM Message Layout
image::images/SPDM_session.svg[align="center"]
image::SPDM_session.svg[align="center"]


Whether the SPDM session is established with the ROT or the physical device, the
Expand Down Expand Up @@ -848,7 +848,7 @@ compatible platform, as illustrated in the follwing figure:

[[COVE_IO_LIFECYCLE]]
.Device and Interface Lifecycle
image::images/cove-io-lifecycle.svg[align="center"]
image::cove-io-lifecycle.svg[align="center"]

The host supervisor domain manager owns the physical device, and manages its
lifecycle. The TSM enforces that this lifecycle management is done without
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2 changes: 1 addition & 1 deletion specification/08-attestation.adoc
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Expand Up @@ -9,7 +9,7 @@ There are two attestation stages involved in the CoVE-IO architecture.
The IETF RATS Remote Attestation Architecture <<RATS>> can be applied to both.

.Remote Attestation Framework (IETF RATS)
image::images/rats-arch.svg[align="center"]
image::rats-arch.svg[align="center"]

=== TVM attesting the Device

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6 changes: 2 additions & 4 deletions specification/Makefile
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Expand Up @@ -10,14 +10,12 @@ ASCIIDOCTOR_PDF := asciidoctor-pdf
OPTIONS := --trace \
-a compress \
-a mathematical-format=svg \
-a pdf-fontsdir=docs-resources/fonts \
-a pdf-style=docs-resources/themes/riscv-pdf.yml \
--failure-level=ERROR
REQUIRES := --require=asciidoctor-bibtex \
--require=asciidoctor-diagram \
--require=asciidoctor-mathematical
REQUIRES := --require=asciidoctor-bibtex \
--require=asciidoctor-diagram \
#REQUIRES := --require=asciidoctor-bibtex \
# --require=asciidoctor-diagram \
# --require=./preprocessor.rb \
--require=asciidoctor-mathematical

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2 changes: 1 addition & 1 deletion specification/docs-resources
710 changes: 0 additions & 710 deletions specification/images/SPDM_session.svg

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374 changes: 0 additions & 374 deletions specification/images/bounce_buffer.svg

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2,081 changes: 0 additions & 2,081 deletions specification/images/cove-io-architecture.svg

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2,328 changes: 0 additions & 2,328 deletions specification/images/cove-io-lifecycle.svg

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865 changes: 0 additions & 865 deletions specification/images/coveio_hierarchy.svg

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504 changes: 0 additions & 504 deletions specification/images/rats-arch.svg

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1 change: 0 additions & 1 deletion specification/images/risc-v_logo.svg

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663 changes: 0 additions & 663 deletions specification/images/rp_rot_idekm.svg

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