Pinned Loading

1. RTL_to_GDS_up_counter RTL_to_GDS_up_counter Public

   RTL to GDS flow for a 8-bit up counter using OpenSource EDA tools

   Shell

2. 20GHz-integer-N-PLL-in-65nm-CMOS-process 20GHz-integer-N-PLL-in-65nm-CMOS-process Public

   Design of a frequency synthesizer to generate the 20 GHz output signal from 100 MHz input using 𝑉𝐷𝐷 of 1.2V in Cadence 65nm CMOS process

   4 2

3. CMOS-OTA-design-using-Cadence-45nm-process-technology CMOS-OTA-design-using-Cadence-45nm-process-technology Public

   A 2 stage CMOS OTA with Differential amplifier with active load as the first stage followed by Common Source stage using Cadence

   2 2

4. Microstrip-Patch-antenna-using-CST-Microwave-Studio Microstrip-Patch-antenna-using-CST-Microwave-Studio Public

   This repository contains the .cst files and results of simulation of the antenna project.

   1

5. Inverter-layout-using-Magic-VLSI-and-NgSpice Inverter-layout-using-Magic-VLSI-and-NgSpice Public

   Design of inverter layout using Magic VLSI Layout opensource EDA tool and NgSpice

   1

6. IRNSS-Standard-Satellite-Signal-Generator IRNSS-Standard-Satellite-Signal-Generator Public

   This repository contains the files used in the design and simulation of Indian Regional Navigation Satellite System (IRNSS) Signal Generator