chore: Rebuild ACIR test artifacts

[TomAFrench]

Description

Problem*

Summary*

This PR addresses the test failures in https://github.com/AztecProtocol/aztec-packages by regenerating the test cases using nargo built from de072ae.

Documentation

• This PR requires documentation updates when merged.

  • I will submit a noir-lang/docs PR.
  • I will request for and support Dev Rel's help in documenting this PR.

Additional Context

PR Checklist*

• I have tested the changes locally.
• I have formatted the changes with Prettier and/or cargo fmt on default settings.

[TomAFrench]

I was a little concerned by the increase in the size of the bytecode in this PR and that we might have a regression on gate counts.

It turns out that it's due to #1766 as we're replacing the quotient directive with a brillig function and so we need to include the bytecode while the directive didn't include its implementation in the ACIR.

Compare simple_shift_left_right from the previous committed artifact

Compiled ACIR for main (unoptimized):
current witness index : 10
public parameters indices : []
return value indices : []
BLACKBOX::RANGE [(_1, num_bits: 32)] [ ]
DIR::QUOTIENT PREDICATE = %EXPR [ 1 ]%
(out : _x1,  (_2, %EXPR [ 2⁴ ]%), _3)
BLACKBOX::RANGE [(_2, num_bits: 28)] [ ]
BLACKBOX::RANGE [(_3, num_bits: 5)] [ ]
BLACKBOX::RANGE [(_3, num_bits: 4)] [ ]
EXPR [ (1, _1) (-2⁴, _2) (-1, _3) 0 ]
DIR::QUOTIENT PREDICATE = %EXPR [ 1 ]%
(out : _%EXPR [ (2⁴, _1) 0 ]%,  (_4, %EXPR [ 2³² ]%), _5)
BLACKBOX::RANGE [(_4, num_bits: 4)] [ ]
BLACKBOX::RANGE [(_5, num_bits: 33)] [ ]
BLACKBOX::RANGE [(_5, num_bits: 32)] [ ]
EXPR [ (2⁴, _1) (-2³², _4) (-1, _5) 0 ]
DIR::QUOTIENT PREDICATE = %EXPR [ 1 ]%
(out : _x5,  (_6, %EXPR [ 2⁸ ]%), _7)
BLACKBOX::RANGE [(_6, num_bits: 24)] [ ]
BLACKBOX::RANGE [(_7, num_bits: 9)] [ ]
BLACKBOX::RANGE [(_7, num_bits: 8)] [ ]
EXPR [ (1, _5) (-2⁸, _6) (-1, _7) 0 ]
EXPR [ (1, _2) (-1, _6) (-1, _8) 0 ]
BRILLIG: inputs: [Single(Expression { mul_terms: [], linear_combinations: [(1, Witness(8))], q_c: 0 })]
outputs: [Simple(Witness(9))]
[JumpIfNot { condition: RegisterIndex(0), location: 3 }, Const { destination: RegisterIndex(1), value: Value { inner: 1 } }, BinaryFieldOp { destination: RegisterIndex(0), op: Div, lhs: RegisterIndex(1), rhs: RegisterIndex(0) }, Stop]

EXPR [ (1, _8, _9) (1, _10) -1 ]
EXPR [ (1, _8, _10) 0 ]
EXPR [ (1, _10) -1 ]

Total ACIR opcodes generated for language PLONKCSat { width: 3 }: 18
Backend circuit size: 2980

to the version committed in this PR

Compiled ACIR for main (unoptimized):
current witness index : 10
public parameters indices : []
return value indices : []
BLACKBOX::RANGE [(_1, num_bits: 32)] [ ]
BRILLIG: inputs: [Single(Expression { mul_terms: [], linear_combinations: [(1, Witness(1))], q_c: 0 }), Single(Expression { mul_terms: [], linear_combinations: [], q_c: 2⁴ }), Single(Expression { mul_terms: [], linear_combinations: [], q_c: 1 })]
outputs: [Simple(Witness(2)), Simple(Witness(3))]
[JumpIfNot { condition: RegisterIndex(2), location: 6 }, BinaryIntOp { destination: RegisterIndex(3), op: UnsignedDiv, bit_size: 33, lhs: RegisterIndex(0), rhs: RegisterIndex(1) }, BinaryIntOp { destination: RegisterIndex(1), op: Mul, bit_size: 33, lhs: RegisterIndex(3), rhs: RegisterIndex(1) }, BinaryIntOp { destination: RegisterIndex(1), op: Sub, bit_size: 33, lhs: RegisterIndex(0), rhs: RegisterIndex(1) }, Mov { destination: RegisterIndex(0), source: RegisterIndex(3) }, Stop, Const { destination: RegisterIndex(0), value: Value { inner: 0 } }, Const { destination: RegisterIndex(1), value: Value { inner: 0 } }, Stop]

BLACKBOX::RANGE [(_2, num_bits: 28)] [ ]
BLACKBOX::RANGE [(_3, num_bits: 5)] [ ]
BLACKBOX::RANGE [(_3, num_bits: 4)] [ ]
EXPR [ (1, _1) (-2⁴, _2) (-1, _3) 0 ]
BRILLIG: inputs: [Single(Expression { mul_terms: [], linear_combinations: [(2⁴, Witness(1))], q_c: 0 }), Single(Expression { mul_terms: [], linear_combinations: [], q_c: 2³² }), Single(Expression { mul_terms: [], linear_combinations: [], q_c: 1 })]
outputs: [Simple(Witness(4)), Simple(Witness(5))]
[JumpIfNot { condition: RegisterIndex(2), location: 6 }, BinaryIntOp { destination: RegisterIndex(3), op: UnsignedDiv, bit_size: 37, lhs: RegisterIndex(0), rhs: RegisterIndex(1) }, BinaryIntOp { destination: RegisterIndex(1), op: Mul, bit_size: 37, lhs: RegisterIndex(3), rhs: RegisterIndex(1) }, BinaryIntOp { destination: RegisterIndex(1), op: Sub, bit_size: 37, lhs: RegisterIndex(0), rhs: RegisterIndex(1) }, Mov { destination: RegisterIndex(0), source: RegisterIndex(3) }, Stop, Const { destination: RegisterIndex(0), value: Value { inner: 0 } }, Const { destination: RegisterIndex(1), value: Value { inner: 0 } }, Stop]

BLACKBOX::RANGE [(_4, num_bits: 4)] [ ]
BLACKBOX::RANGE [(_5, num_bits: 33)] [ ]
BLACKBOX::RANGE [(_5, num_bits: 32)] [ ]
EXPR [ (2⁴, _1) (-2³², _4) (-1, _5) 0 ]
BRILLIG: inputs: [Single(Expression { mul_terms: [], linear_combinations: [(1, Witness(5))], q_c: 0 }), Single(Expression { mul_terms: [], linear_combinations: [], q_c: 2⁸ }), Single(Expression { mul_terms: [], linear_combinations: [], q_c: 1 })]
outputs: [Simple(Witness(6)), Simple(Witness(7))]
[JumpIfNot { condition: RegisterIndex(2), location: 6 }, BinaryIntOp { destination: RegisterIndex(3), op: UnsignedDiv, bit_size: 33, lhs: RegisterIndex(0), rhs: RegisterIndex(1) }, BinaryIntOp { destination: RegisterIndex(1), op: Mul, bit_size: 33, lhs: RegisterIndex(3), rhs: RegisterIndex(1) }, BinaryIntOp { destination: RegisterIndex(1), op: Sub, bit_size: 33, lhs: RegisterIndex(0), rhs: RegisterIndex(1) }, Mov { destination: RegisterIndex(0), source: RegisterIndex(3) }, Stop, Const { destination: RegisterIndex(0), value: Value { inner: 0 } }, Const { destination: RegisterIndex(1), value: Value { inner: 0 } }, Stop]

BLACKBOX::RANGE [(_6, num_bits: 24)] [ ]
BLACKBOX::RANGE [(_7, num_bits: 9)] [ ]
BLACKBOX::RANGE [(_7, num_bits: 8)] [ ]
EXPR [ (1, _5) (-2⁸, _6) (-1, _7) 0 ]
EXPR [ (1, _2) (-1, _6) (-1, _8) 0 ]
BRILLIG: inputs: [Single(Expression { mul_terms: [], linear_combinations: [(1, Witness(8))], q_c: 0 })]
outputs: [Simple(Witness(9))]
[JumpIfNot { condition: RegisterIndex(0), location: 3 }, Const { destination: RegisterIndex(1), value: Value { inner: 1 } }, BinaryFieldOp { destination: RegisterIndex(0), op: Div, lhs: RegisterIndex(1), rhs: RegisterIndex(0) }, Stop]

EXPR [ (1, _8, _9) (1, _10) -1 ]
EXPR [ (1, _8, _10) 0 ]
EXPR [ (1, _10) -1 ]

[simple_shift_left_right] Total ACIR opcodes generated for language PLONKCSat { width: 3 }: 18
[simple_shift_left_right] Backend circuit size: 2980