Documentation for the actual design
- IN:
- IN[0]: clock
- IN[1]: reset
- IN[2]: instruction[0]
- IN[3]: instruction[1]
- IN[4]: DATA[0]
- IN[5]: DATA[1]
- IN[6]: DATA[2]
- IN[7]: DATA[3]
- OUT:
- OUT[0]: program counter[0]
- OUT[1]: program counter[1]
- OUT[2]: program counter[2]
- OUT[3]: program counter[3]
- OUT[4]: register value[0]
- OUT[5]: register value[1]
- OUT[6]: register value[2]
- OUT[7]: register value[3]
LOADPROG = 2'd0, //loads a program into the program "file" using IN[7:4]
LOADDATA = 2'd1, //loads data into the data "file" using IN[7:4]
SETRUNPT = 2'd2, //designed to be used right before run, but can also be used to input additional data i guess
RUNPROG = 2'd3 //run the program
LOAD = 4'd0, //loads a value from data file into register
STORE = 4'd1, //stores value from register to data file
ADD = 4'd2, //adds datac to register value
MUL = 4'd3, //multiples register value by datac
SUB = 4'd4, //subtracts datac from register value
SHIFTL = 4'd5, //shifts register value left by datac
SHIFTR = 4'd6, //shifts register value right by datac
JUMPTOIF = 4'd7, //jumps pc to data[value] if io_in[7] is a 1, else
//does nothing
LOGICAND = 4'd8,
//logical and between register value and datac
LOGICOR = 4'd9,
//logical or between register value and datac
EQUALS = 4'd10,
//equality check between register value and datac
NEQ = 4'd11,
//inequality check between register value and datac
BITAND = 4'd12,
//bitwise and between register value and datac
BITOR = 4'd13,
//bitwise or between register value and datac
LOGICNOT = 4'd14,
//logical not on register value
BITNOT = 4'd15
//bitwise not on register value
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Edit the info.yaml and change the wokwi_id to match your project.
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