risc-v/bl808, sg2000: Configure MMU to cache Kernel Text, Data and Heap (T-Head C906) #67
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Summary
This PR configures the BL808 and SG2000 MMU (inside T-Head C906) to cache the the Kernel Text, Data and Heap. We set the MMU Flags (Shareable, Bufferable and Cacheable) as explained in this article.
This PR fixes the Slow Memory Access for NuttX Kernel on BL808 and SG2000: apache#12696. In the next PR, we will fix the Slow Memory Access for NuttX Apps, by caching the User Text and Data.
arch/risc-v/src/bl808/bl808_mm_init.c
: Added MMU Flags (Shareable, Bufferable and Cacheable) for BL808 Kernel Text, Data and Heaparch/risc-v/src/sg2000/sg2000_mm_init.c
: Added MMU Flags (Shareable, Bufferable and Cacheable) for SG2000 Kernel Text, Data and HeapImpact
This PR only affects Kernel Memory Caching for Ox64 BL808 SBC and Milk-V Duo S SG2000 SBC.
No other platforms are affected.
Testing
We test Ox64 BL808 SBC and Milk-V Duo S SG2000 SBC with a NOP Loop that iterates 40,000,000 times:
Without MMU Caching: NOP Loop completes after 10 seconds
Ox64 Video / Ox64 Log
Duo S Video / Duo S Log
With MMU Caching: NOP Loop completes immediately
Ox64 Video / Ox64 Log
Duo S Video / Duo S Log
For Regression Testing: We successfully tested OSTest on Ox64 BL808 SBC and Milk-V Duo S SG2000 SBC:
Ox64 Video / Ox64 Log
Duo S Video / Duo S Log
Thanks to @??? for tracking down the cause of the issue.