tools/[Rust|D]: Fix the Rust and D Builds for QEMU RISC-V

This PR fixes the build for Rust Apps and D Apps on QEMU RISC-V. Previously the Rust Build selected the [incorrect Rust Target riscv64i-unknown-none-elf](https://lupyuen.github.io/articles/rust5#rust-target-is-incorrect). Now the Rust Build selects the correct Rust Target: riscv64gc-unknown-none-elf.

This PR also fixes the 32-bit RISC-V Target for D Apps. D Targets ("riscv32") are named differently from Rust Targets ("riscv32gc"), this PR restores the correct Target Names.

Note that Rust Apps won't build correctly for QEMU RISC-V 32-bit. This requires a [Rust Custom Target for riscv32gc](https://lupyuen.github.io/articles/rust4#custom-target-for-rust), which will make the NuttX Makefiles much more complicated.

Also note that `hello_d` won't build correctly for 64-bit `rv-virt:nsh64`. To date, NuttX has never supported 64-bit RISC-V for D Apps.

Modified Files:

`tools/Rust.defs`: Rename the RISC-V ISA `imafdc` to `gc` for Rust Targets

`tools/D.defs`: Exclude the RISC-V ISA for D Targets

tools/D.defs

@@ -46,28 +46,18 @@ ifeq ($(CONFIG_ARCH_SIM),y)
     DFLAGS += -mtriple=$(LLVM_ARCHTYPE)-apple-$(LLVM_ABITYPE)
   endif
 else ifeq ($(CONFIG_ARCH_RISCV),y)
-  # Traget triple is riscv[32|64][isa]-unknown-none-elf
+  # Target triple is riscv[32|64]-unknown-none-elf
+  DFLAGS += -mtriple=$(LLVM_ARCHTYPE)-unknown-none-elf
+  DFLAGS += -mattr=+m,+a,+f,+d,+c
 
-  D_ARCHTYPE = $(LLVM_ARCHTYPE)i
-  ifeq ($(CONFIG_ARCH_RV_ISA_M),y)
-    D_ARCHTYPE := $(D_ARCHTYPE)m
+  # Handle ABI and CPU
+  ifeq ($(CONFIG_ARCH_RV32),y)
+    DFLAGS += -mcpu=generic-rv32
+    DFLAGS += -mabi=ilp32d
+  else ifeq ($(CONFIG_ARCH_RV64),y)
+    DFLAGS += -mcpu=generic-rv64
+    DFLAGS += -mabi=lp64d
   endif
-  ifeq ($(CONFIG_ARCH_RV_ISA_A),y)
-    D_ARCHTYPE := $(D_ARCHTYPE)a
-  endif
-  ifeq ($(CONFIG_ARCH_RV_ISA_F),y)
-    D_ARCHTYPE := $(D_ARCHTYPE)f
-  endif
-  ifeq ($(CONFIG_ARCH_RV_ISA_D),y)
-    D_ARCHTYPE := $(D_ARCHTYPE)d
-  endif
-  ifeq ($(CONFIG_ARCH_RV_ISA_C),y)
-    D_ARCHTYPE := $(D_ARCHTYPE)c
-  endif
-
-  DFLAGS += -mtriple=$(D_ARCHTYPE)-unknown-none-elf
-  DFLAGS += -mattr=+m,+a,+f,+d,+c -mabi=ilp32d
-  DFLAGS += -mcpu=generic-rv32
 else
   # For arm, but there are some other archs not support yet,
   # such as xtensa, x86 bare metal, etc.

tools/Rust.defs

@@ -45,23 +45,28 @@ ifeq ($(CONFIG_ARCH_SIM),y)
     RUSTFLAGS += --target $(LLVM_ARCHTYPE)-apple-$(LLVM_ABITYPE)
   endif
 else ifeq ($(CONFIG_ARCH_RISCV),y)
-  # Traget triple is riscv[32|64][isa]-unknown-none-elf
+  # Target triple is riscv[32|64][isa]-unknown-none-elf
+  # "imafdc" becomes "gc"
 
-  RUST_ARCHTYPE = $(LLVM_ARCHTYPE)i
-  ifeq ($(CONFIG_ARCH_RV_ISA_M),y)
-    RUST_ARCHTYPE := $(RUST_ARCHTYPE)m
-  endif
-  ifeq ($(CONFIG_ARCH_RV_ISA_A),y)
-    RUST_ARCHTYPE := $(RUST_ARCHTYPE)a
-  endif
-  ifeq ($(CONFIG_ARCH_RV_ISA_F),y)
-    RUST_ARCHTYPE := $(RUST_ARCHTYPE)f
-  endif
-  ifeq ($(CONFIG_ARCH_RV_ISA_D),y)
-    RUST_ARCHTYPE := $(RUST_ARCHTYPE)d
-  endif
-  ifeq ($(CONFIG_ARCH_RV_ISA_C),y)
-    RUST_ARCHTYPE := $(RUST_ARCHTYPE)c
+  ifeq ($(CONFIG_ARCH_RV_ISA_M)$(CONFIG_ARCH_RV_ISA_A)$(CONFIG_ARCH_FPU)$(CONFIG_ARCH_DPFPU)$(CONFIG_ARCH_RV_ISA_C),yyyyy)
+    RUST_ARCHTYPE = $(LLVM_ARCHTYPE)gc
+  else
+    RUST_ARCHTYPE = $(LLVM_ARCHTYPE)i
+    ifeq ($(CONFIG_ARCH_RV_ISA_M),y)
+      RUST_ARCHTYPE := $(RUST_ARCHTYPE)m
+    endif
+    ifeq ($(CONFIG_ARCH_RV_ISA_A),y)
+      RUST_ARCHTYPE := $(RUST_ARCHTYPE)a
+    endif
+    ifeq ($(CONFIG_ARCH_FPU),y)
+      RUST_ARCHTYPE := $(RUST_ARCHTYPE)f
+    endif
+    ifeq ($(CONFIG_ARCH_DPFPU),y)
+      RUST_ARCHTYPE := $(RUST_ARCHTYPE)d
+    endif
+    ifeq ($(CONFIG_ARCH_RV_ISA_C),y)
+      RUST_ARCHTYPE := $(RUST_ARCHTYPE)c
+    endif
   endif
 
   RUSTFLAGS += --target $(RUST_ARCHTYPE)-unknown-none-elf