Add support for child refs that are banks and multiports

lf-lang · Aug 11, 2022 · d81d8a6 · d81d8a6
1 parent 023e6b1
commit d81d8a6
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Showing 2 changed files with 5 additions and 1 deletion.
diff --git a/org.lflang/src/org/lflang/generator/rust/PortEmitter.kt b/org.lflang/src/org/lflang/generator/rust/PortEmitter.kt
@@ -69,6 +69,8 @@ object PortEmitter : RustEmitterBase() {
 
             if (isBank && !isMultiport) {
                 lhsPorts = "unsafe_iter_bank!($rustChildName # $rustFieldOnChildName)"
+            } else if (isBank && isMultiport) {
+                lhsPorts = "unsafe_iter_bank!($rustChildName # ($rustFieldOnChildName)+)"
             }
 
             if (isInput) {

diff --git a/org.lflang/src/org/lflang/generator/rust/RustReactorEmitter.kt b/org.lflang/src/org/lflang/generator/rust/RustReactorEmitter.kt
@@ -361,8 +361,10 @@ ${"             |        "..declareChildConnections()}
         }
         is ChildPortReference -> {
             if (isMultiport || isBank) {
-                val width = if (isMultiport && !isBank) {
+                val width = if (!isBank && isMultiport) {
                     widthSpecMultiport
+                } else if (isBank && isMultiport) {
+                    "$widthSpecBank * $widthSpecMultiport"
                 } else {
                     widthSpecBank
                 }