[CPU] Switch to new pass generation tablegen definitions (#18132)

This is mostly an NFC change. It does more cleanups on ConvertToLLVM
pass which moves private options to tablegen definition. Also, the
revision removes a duplicated option from the ConvertToLLVM pass. The
additional change is that it adds dependent dialects to ConvertToLLVM
pass.

This is generally good because it removes the duplication of pass
definition, and remove the magic numbers from the pass declarations.
Before the change, we duplicate all the option default values to
`Passes.h`.

Some passes are still defined in `Passes.h` because passing tablegen
option struct is a visual noise. It makes the pipeline configuration
much cleaner.

---------

Signed-off-by: hanhanW <hanhan0912@gmail.com>

compiler/src/iree/compiler/Codegen/Common/CPU/BUILD.bazel

@@ -28,7 +28,6 @@ iree_gentbl_cc_library(
 iree_compiler_cc_library(
     name = "PassHeaders",
     hdrs = [
-        "PassDetail.h",
         "Passes.h",
         "Passes.h.inc",
     ],

compiler/src/iree/compiler/Codegen/Common/CPU/CMakeLists.txt

@@ -23,7 +23,6 @@ iree_cc_library(
   NAME
     PassHeaders
   HDRS
-    "PassDetail.h"
     "Passes.h"
     "Passes.h.inc"
   DEPS

compiler/src/iree/compiler/Codegen/Common/CPU/CPULowerToUKernels.cpp

@@ -5,7 +5,6 @@
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 
 #include "iree/builtins/ukernel/exported_bits.h"
-#include "iree/compiler/Codegen/Common/CPU/PassDetail.h"
 #include "iree/compiler/Codegen/Common/CPU/Passes.h"
 #include "iree/compiler/Codegen/Common/EncodingUtils.h"
 #include "iree/compiler/Codegen/Dialect/Codegen/IR/IREECodegenDialect.h"
@@ -27,6 +26,9 @@
 
 namespace mlir::iree_compiler {
 
+#define GEN_PASS_DEF_CPULOWERTOUKERNELSPASS
+#include "iree/compiler/Codegen/Common/CPU/Passes.h.inc"
+
 // Returns the CastOpInterface op of the body, if
 //   - the `genericOp` is element-wise with identity maps, and
 //   - it has only a  CastOpInterface op.
@@ -54,32 +56,18 @@ getCastOpOfElementWiseCast(linalg::GenericOp genericOp) {
 
 namespace {
 class CPULowerToUKernelsPass
-    : public CPULowerToUKernelsBase<CPULowerToUKernelsPass> {
+    : public impl::CPULowerToUKernelsPassBase<CPULowerToUKernelsPass> {
 public:
-  CPULowerToUKernelsPass(bool skipIntermediateRoundings)
-      : skipIntermediateRoundings(skipIntermediateRoundings) {}
-
+  using impl::CPULowerToUKernelsPassBase<
+      CPULowerToUKernelsPass>::CPULowerToUKernelsPassBase;
+  explicit CPULowerToUKernelsPass(bool skipIntermediateRoundings) {
+    this->skipIntermediateRoundings = skipIntermediateRoundings;
+  }
   void getDependentDialects(DialectRegistry &registry) const override {
     registry.insert<IREE::Codegen::IREECodegenDialect>();
   }
 
   void runOnOperation() override;
-
-  LogicalResult initializeOptions(
-      StringRef options,
-      function_ref<LogicalResult(const Twine &)> errorHandler) override {
-    if (failed(Pass::initializeOptions(options, errorHandler))) {
-      return failure();
-    }
-    // This option defaults to `true` both in Passes.td and in C++ code.
-    // If either side has `false`, that's a non-default choice, so we let that
-    // override a `true` on the other side.
-    skipIntermediateRoundings &= optionSkipIntermediateRoundings;
-    return success();
-  }
-
-private:
-  bool skipIntermediateRoundings;
 };
 } // namespace
 

compiler/src/iree/compiler/Codegen/Common/CPU/CPUMaterializeEncodings.cpp

@@ -4,7 +4,6 @@
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 
-#include "iree/compiler/Codegen/Common/CPU/PassDetail.h"
 #include "iree/compiler/Codegen/Common/CPU/Passes.h"
 #include "iree/compiler/Codegen/Common/EncodingUtils.h"
 #include "iree/compiler/Codegen/Dialect/Codegen/IR/IREECodegenDialect.h"
@@ -31,6 +30,10 @@
 
 namespace mlir::iree_compiler {
 
+#define GEN_PASS_DEF_CPUMATERIALIZEDEVICEENCODINGPASS
+#define GEN_PASS_DEF_CPUMATERIALIZEHOSTENCODINGPASS
+#include "iree/compiler/Codegen/Common/CPU/Passes.h.inc"
+
 // Enumerate tile sizes to choose from when no specific architecture is
 // targeted. For narrow-{M,N} cases, this only enumerates on narrow M. The
 // narrow-N cases are handled by transposition in chooseMatmulTile.
@@ -529,9 +532,8 @@ getFuncExecutableTargetAttrs(FunctionOpInterface funcOp,
 }
 
 struct CPUMaterializeHostEncodingPass
-    : public CPUMaterializeHostEncodingBase<CPUMaterializeHostEncodingPass> {
-  CPUMaterializeHostEncodingPass() = default;
-
+    : public impl::CPUMaterializeHostEncodingPassBase<
+          CPUMaterializeHostEncodingPass> {
   void getDependentDialects(DialectRegistry &registry) const override {
     registry.insert<arith::ArithDialect, tensor::TensorDialect,
                     IREE::Codegen::IREECodegenDialect>();
@@ -585,19 +587,13 @@ struct CPUMaterializeHostEncodingPass
   }
 };
 
-std::unique_ptr<Pass> createCPUMaterializeHostEncodingPass() {
-  return std::make_unique<CPUMaterializeHostEncodingPass>();
-}
-
 // NOTE: this runs on host modules and executables and has two paths to handle
 // that. It should _not_ be running on both - target-specific codegen passes
 // are not allowed on host programs and it's a big violation of layering that
 // this exists.
 struct CPUMaterializeDeviceEncodingPass
-    : public CPUMaterializeDeviceEncodingBase<
+    : public impl::CPUMaterializeDeviceEncodingPassBase<
           CPUMaterializeDeviceEncodingPass> {
-  CPUMaterializeDeviceEncodingPass() = default;
-
   void getDependentDialects(DialectRegistry &registry) const override {
     registry.insert<arith::ArithDialect, tensor::TensorDialect,
                     IREE::Codegen::IREECodegenDialect>();
@@ -612,8 +608,4 @@ struct CPUMaterializeDeviceEncodingPass
   }
 };
 
-std::unique_ptr<Pass> createCPUMaterializeDeviceEncodingPass() {
-  return std::make_unique<CPUMaterializeDeviceEncodingPass>();
-}
-
 } // namespace mlir::iree_compiler

compiler/src/iree/compiler/Codegen/Common/CPU/CPUPrepareUkernels.cpp

@@ -4,7 +4,6 @@
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 
-#include "iree/compiler/Codegen/Common/CPU/PassDetail.h"
 #include "iree/compiler/Codegen/Common/CPU/Passes.h"
 #include "iree/compiler/Codegen/Dialect/Codegen/IR/IREECodegenAttrs.h"
 #include "iree/compiler/Codegen/Utils/Utils.h"
@@ -15,6 +14,8 @@
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir::iree_compiler {
+#define GEN_PASS_DEF_CPUPREPAREUKERNELSPASS
+#include "iree/compiler/Codegen/Common/CPU/Passes.h.inc"
 
 namespace {
 
@@ -392,7 +393,7 @@ struct Convert5DUnPackto4DUnPackPattern
 };
 
 struct CPUPrepareUkernelsPass
-    : public CPUPrepareUkernelsBase<CPUPrepareUkernelsPass> {
+    : public impl::CPUPrepareUkernelsPassBase<CPUPrepareUkernelsPass> {
   void getDependentDialects(DialectRegistry &registry) const override {
     registry.insert<linalg::LinalgDialect, arith::ArithDialect,
                     tensor::TensorDialect, scf::SCFDialect>();
@@ -437,10 +438,4 @@ void CPUPrepareUkernelsPass::runOnOperation() {
     return signalPassFailure();
   }
 }
-
-std::unique_ptr<InterfacePass<mlir::FunctionOpInterface>>
-createCPUPrepareUkernelsPass() {
-  return std::make_unique<CPUPrepareUkernelsPass>();
-}
-
 } // namespace mlir::iree_compiler

compiler/src/iree/compiler/Codegen/Common/CPU/Passes.h

@@ -19,24 +19,22 @@
 
 namespace mlir::iree_compiler {
 
-/// Convert encoding-specific operations based on target attributes. Examples:
-///   encoding.set_encoding   -> tensor.pack
-///   encoding.unset_encoding -> tensor.unpack
-///   linalg.matmul             -> linalg.mmt4d
-std::unique_ptr<Pass> createCPUMaterializeHostEncodingPass();
-std::unique_ptr<Pass> createCPUMaterializeDeviceEncodingPass();
+//------------------------------------------------------------------------------
+// Wrappers that not use tablegen options.
+//------------------------------------------------------------------------------
+
+std::unique_ptr<OperationPass<>>
+createCPULowerToUKernelsPass(bool skipIntermediateRoundings);
 
 /// Adds CPU bufferization passes to the pipeline.
 void addCPUBufferizePasses(OpPassManager &funcPassManager);
 
-/// Pass to lower a sequence of operations to a iree_codegen.ukernel.*
-/// operation.
-std::unique_ptr<OperationPass<>>
-createCPULowerToUKernelsPass(bool skipIntermediateRoundings = true);
+//----------------------------------------------------------------------------//
+// Register Common CPU Passes
+//----------------------------------------------------------------------------//
 
-/// Pass to decompose batch_mmt4d/pack/etc to fit ukernel requirements.
-std::unique_ptr<InterfacePass<FunctionOpInterface>>
-createCPUPrepareUkernelsPass();
+#define GEN_PASS_DECL
+#include "iree/compiler/Codegen/Common/CPU/Passes.h.inc" // IWYU pragma: keep
 
 void registerCodegenCommonCPUPasses();
 

compiler/src/iree/compiler/Codegen/Common/CPU/Passes.td

@@ -13,37 +13,41 @@ include "mlir/Pass/PassBase.td"
 // Common Passes used for CPU-like backends (keep alphabetical)
 //===---------------------------------------------------------------------===//
 
-def CPUMaterializeHostEncoding :
+def CPUMaterializeHostEncodingPass :
     Pass<"iree-codegen-cpu-materialize-host-encoding", "mlir::ModuleOp"> {
-  let summary = "Materialize the encoding for tensor as specified by the backend.";
-  let constructor = "mlir::iree_compiler::createCPUMaterializeHostEncodingPass()";
+  let summary = "Convert encoding-specific operations based on target attributes.";
+  let description = [{
+    Examples:
+      encoding.set_encoding   -> tensor.pack
+      encoding.unset_encoding -> tensor.unpack
+      linalg.matmul             -> linalg.mmt4d  "}];
 }
 
-def CPUMaterializeDeviceEncoding :
+def CPUMaterializeDeviceEncodingPass :
     InterfacePass<"iree-codegen-cpu-materialize-device-encoding", "mlir::FunctionOpInterface"> {
-  let summary = "Materialize the encoding for tensor as specified by the backend.";
-  let constructor = "mlir::iree_compiler::createCPUMaterializeDeviceEncodingPass()";
+  let summary = "Convert encoding-specific operations based on target attributes.";
+  let description = [{
+    Examples:
+      encoding.set_encoding   -> tensor.pack
+      encoding.unset_encoding -> tensor.unpack
+      linalg.matmul             -> linalg.mmt4d  "}];
 }
 
-def CPULowerToUKernels :
+def CPULowerToUKernelsPass :
     Pass<"iree-codegen-cpu-lower-to-ukernels", ""> {
   let summary =
       "Separate out parts of the IR that lower to a micro-kernel";
-  let constructor =
-      "mlir::iree_compiler::createCPULowerToUKernelsPass()";
   let options = [
-    Option<"optionSkipIntermediateRoundings", "skip-intermediate-roundings",
+    Option<"skipIntermediateRoundings", "skip-intermediate-roundings",
       "bool", /*default=*/"true",
       "Allow skipping intermediate roundings, e.g. in f16 ukernels internally doing f32 arithmetic.">,
   ];
 }
 
-def CPUPrepareUkernels :
+def CPUPrepareUkernelsPass :
     InterfacePass<"iree-codegen-cpu-prepare-ukernels", "mlir::FunctionOpInterface"> {
   let summary = "Rank reduce operations to fit existing ukernels requirements."
                 "For example, batch_mmt4d ops are decomposed to mmt4d ops";
-  let constructor =
-      "mlir::iree_compiler::createCPUPrepareUkernelsPass()";
 }
 
 #endif  // IREE_CODEGEN_COMMON_CPU_PASSES

compiler/src/iree/compiler/Codegen/LLVMCPU/BUILD.bazel

@@ -28,7 +28,6 @@ iree_gentbl_cc_library(
 iree_compiler_cc_library(
     name = "PassHeaders",
     hdrs = [
-        "PassDetail.h",
         "Passes.h",
         "Passes.h.inc",
     ],

compiler/src/iree/compiler/Codegen/LLVMCPU/CMakeLists.txt

@@ -23,7 +23,6 @@ iree_cc_library(
   NAME
     PassHeaders
   HDRS
-    "PassDetail.h"
     "Passes.h"
     "Passes.h.inc"
   DEPS

compiler/src/iree/compiler/Codegen/LLVMCPU/ConvertToLLVM.cpp

@@ -6,7 +6,6 @@
 
 #include "iree/compiler/Codegen/Common/PassUtils.h"
 #include "iree/compiler/Codegen/LLVMCPU/DispatchABI.h"
-#include "iree/compiler/Codegen/LLVMCPU/PassDetail.h"
 #include "iree/compiler/Codegen/LLVMCPU/Passes.h"
 #include "iree/compiler/Codegen/LLVMCPU/Utils.h"
 #include "iree/compiler/Codegen/Utils/Utils.h"
@@ -50,6 +49,7 @@
 #include "mlir/Dialect/LLVMIR/LLVMTypes.h"
 #include "mlir/Dialect/Math/IR/Math.h"
 #include "mlir/Dialect/Math/Transforms/Passes.h"
+#include "mlir/Dialect/MemRef/IR/MemRef.h"
 #include "mlir/Dialect/MemRef/Transforms/Transforms.h"
 #include "mlir/Dialect/Tosa/IR/TosaOps.h"
 #include "mlir/Dialect/Vector/IR/VectorOps.h"
@@ -66,6 +66,9 @@
 
 namespace mlir::iree_compiler {
 
+#define GEN_PASS_DEF_CONVERTTOLLVMPASS
+#include "iree/compiler/Codegen/LLVMCPU/Passes.h.inc"
+
 namespace {
 
 template <typename OpT>
@@ -914,31 +917,21 @@ class ExpandMulSIExtended : public OpRewritePattern<arith::MulSIExtendedOp> {
   }
 };
 
-class ConvertToLLVMPass : public ConvertToLLVMBase<ConvertToLLVMPass> {
+class ConvertToLLVMPass
+    : public impl::ConvertToLLVMPassBase<ConvertToLLVMPass> {
 public:
-  ConvertToLLVMPass(bool reassociateFpReductions) {
-    targetReassociateFpReductions.setValue(reassociateFpReductions);
+  using impl::ConvertToLLVMPassBase<ConvertToLLVMPass>::ConvertToLLVMPassBase;
+  explicit ConvertToLLVMPass(bool reassociateFpReductions) {
+    this->reassociateFpReductions = reassociateFpReductions;
   }
-  ConvertToLLVMPass(const ConvertToLLVMPass &pass) {}
   void getDependentDialects(DialectRegistry &registry) const override {
-    registry.insert<LLVM::LLVMDialect, arm_neon::ArmNeonDialect,
-                    affine::AffineDialect>();
+    registry.insert<arith::ArithDialect, math::MathDialect, func::FuncDialect,
+                    memref::MemRefDialect, linalg::LinalgDialect,
+                    tosa::TosaDialect, scf::SCFDialect, vector::VectorDialect,
+                    arm_neon::ArmNeonDialect, arm_sve::ArmSVEDialect,
+                    LLVM::LLVMDialect>();
   }
-
   void runOnOperation() override;
-
-private:
-  Option<std::string> targetTriple{
-      *this, "target-triple", llvm::cl::desc("Code generation target triple."),
-      llvm::cl::init("")};
-  Option<std::string> targetDataLayout{
-      *this, "target-data-layout",
-      llvm::cl::desc("Code generation target data layout."),
-      llvm::cl::init("")};
-  Option<bool> targetReassociateFpReductions{
-      *this, "target-reassociate-fp-reductions",
-      llvm::cl::desc("Code generation target reassociate FP reductions."),
-      llvm::cl::init("false")};
 };
 
 } // namespace
@@ -952,15 +945,14 @@ static std::string getStringAttrFromTargetAttr(ModuleOp module,
 
 void ConvertToLLVMPass::runOnOperation() {
   auto module = getOperation();
-  std::string dataLayoutStr = targetDataLayout.getValue();
+  std::string dataLayoutStr = targetDataLayout;
   if (targetDataLayout.empty()) {
     dataLayoutStr = getStringAttrFromTargetAttr(module, "data_layout");
   }
-  std::string targetTripleStr = targetTriple.getValue();
+  std::string targetTripleStr = targetTriple;
   if (targetTripleStr.empty()) {
     targetTripleStr = getStringAttrFromTargetAttr(module, "target_triple");
   }
-
   // Add required attributes to the module so that the lowering knows how to
   // handle structs and data layouts.
   module->setAttr(LLVM::LLVMDialect::getTargetTripleAttrName(),
@@ -1056,8 +1048,8 @@ void ConvertToLLVMPass::runOnOperation() {
   // unroll them to 1-D before converting to the LLVM dialect.
   vector::populateVectorBitCastLoweringPatterns(patterns);
   populateVectorToLLVMMatrixConversionPatterns(typeConverter, patterns);
-  populateVectorToLLVMConversionPatterns(
-      typeConverter, patterns, targetReassociateFpReductions.getValue());
+  populateVectorToLLVMConversionPatterns(typeConverter, patterns,
+                                         reassociateFpReductions);
 
   if (isAArch64(targetAttr) &&
       (hasAnySVEFeature(targetAttr) || hasSMEFeature(targetAttr))) {