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[SYCL-PTX] Libclc binding for SYCL device #1914
[SYCL-PTX] Libclc binding for SYCL device #1914
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@bader This relates to one of the question I raised during the unstreaming call regarding the mangling approach (adding AS0 for SYCL device). This is kind of a workaround so that the lib binds correctly which what the sycl device compile generates. |
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@Naghasan, please, take a look at this use case: https://github.com/bader/llvm/pull/18/files#diff-9cbf615457fd73dff7e9840ed855fa9aR82-R87. I think we need two separate instances of Do you have any ideas how we can handle this case w/o modifying the mangler? |
The link don't put me on the region you highlight.
Not much idea at the moment unfortunately. I tried a few things, but the ripple effect were quite large. Hence the workaround here. |
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There is one that I haven't tried yet: create an address space mapping specificaly for the mangling. We should perhaps discuss this in a specific issue. |
SYCL uses a custom mangling scheme (mangles target address space 0). This patch adds a "binding" layer (sycldevice-binding.cpp). The binding layer is compiled in sycl device mode which allow to generate the expected mangling when the target address space is 0. Signed-off-by: Victor Lomuller <victor@codeplay.com>
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LIT failures on CUDA most likely caused by #1919. |
This reverts commit 761b2ea.
SYCL uses a custom mangling scheme (mangles target address space 0).
This patch adds a "binding" layer (sycldevice-binding.cpp).
The binding layer is compiled in sycl device mode which allow to generate
the expected mangling when the target address space is 0.
Signed-off-by: Victor Lomuller victor@codeplay.com