v109.4

* PC Engine: various improvements
* PC Engine CD: started on emulation

higan/emulator/emulator.hpp

@@ -47,7 +47,7 @@ namespace higan {
 
 namespace higan {
   static const string Name      = "higan";
-  static const string Version   = "109.3";
+  static const string Version   = "109.4";
   static const string Copyright = "byuu";
   static const string License   = "GPLv3";
   static const string Website   = "https://byuu.org";

higan/md/mcd/mcd.cpp

@@ -54,6 +54,8 @@ auto MCD::load(Node::Object parent, Node::Object from) -> void {
 }
 
 auto MCD::unload() -> void {
+  disconnect();
+
   if(expansion.node) {
     if(auto fp = platform->open(expansion.node, "backup.ram", File::Write)) {
       bram.save(fp);

higan/pce/GNUmakefile

@@ -1,14 +1,15 @@
 components += huc6280
 
 objects += pce-interface
-objects += pce-cpu pce-vdp pce-psg
+objects += pce-cpu pce-vdp pce-psg pce-pcd
 objects += pce-system pce-cartridge
 objects += pce-controller
 
 obj/pce-interface.o:  pce/interface/interface.cpp
 obj/pce-cpu.o:        pce/cpu/cpu.cpp
 obj/pce-vdp.o:        pce/vdp/vdp.cpp
 obj/pce-psg.o:        pce/psg/psg.cpp
+obj/pce-pcd.o:        pce/pcd/pcd.cpp
 obj/pce-system.o:     pce/system/system.cpp
 obj/pce-cartridge.o:  pce/cartridge/cartridge.cpp
 obj/pce-controller.o: pce/controller/controller.cpp

higan/pce/cartridge/board/board.cpp

@@ -3,5 +3,7 @@ namespace Board {
 #include "linear.cpp"
 #include "split.cpp"
 #include "banked.cpp"
+#include "ram.cpp"
+#include "system-card.cpp"
 
 }

higan/pce/cartridge/board/board.hpp

@@ -12,5 +12,7 @@ struct Interface {
 #include "linear.hpp"
 #include "split.hpp"
 #include "banked.hpp"
+#include "ram.hpp"
+#include "system-card.hpp"
 
 }

higan/pce/cartridge/board/ram.cpp

@@ -0,0 +1,37 @@
+auto RAM::load(Markup::Node document) -> void {
+  if(auto memory = document["game/board/memory(type=ROM,content=Program)"]) {
+    rom.allocate(memory["size"].natural());
+    if(auto fp = platform->open(cartridge.node, "program.rom", File::Read, File::Required)) {
+      rom.load(fp);
+    }
+  }
+
+  if(auto memory = document["game/board/memory(type=RAM,content=Save)"]) {
+    ram.allocate(memory["size"].natural());
+    if(auto fp = platform->open(cartridge.node, "save.ram", File::Read)) {
+      ram.load(fp);
+    }
+  }
+}
+
+auto RAM::save(Markup::Node document) -> void {
+  if(auto memory = document["game/board/memory(type=RAM,content=Save)"]) {
+    if(auto fp = platform->open(cartridge.node, "save.ram", File::Write)) {
+      ram.save(fp);
+    }
+  }
+}
+
+auto RAM::read(uint8 bank, uint13 address) -> uint8 {
+  return rom.read(bank << 13 | address);
+}
+
+auto RAM::write(uint8 bank, uint13 address, uint8 data) -> void {
+}
+
+auto RAM::power() -> void {
+}
+
+auto RAM::serialize(serializer& s) -> void {
+  if(ram) ram.serialize(s);
+}

higan/pce/cartridge/board/ram.hpp

@@ -0,0 +1,11 @@
+struct RAM : Interface {
+  auto load(Markup::Node) -> void override;
+  auto save(Markup::Node) -> void override;
+  auto read(uint8 bank, uint13 address) -> uint8 override;
+  auto write(uint8 bank, uint13 address, uint8 data) -> void override;
+  auto power() -> void override;
+  auto serialize(serializer&) -> void;
+
+  Memory::Readable<uint8> rom;
+  Memory::Writable<uint8> ram;
+};

higan/pce/cartridge/board/system-card.cpp

@@ -0,0 +1,44 @@
+auto SystemCard::load(Markup::Node document) -> void {
+  if(auto memory = document["game/board/memory(type=ROM,content=Program)"]) {
+    rom.allocate(memory["size"].natural());
+    if(auto fp = platform->open(cartridge.node, "program.rom", File::Read, File::Required)) {
+      rom.load(fp);
+    }
+  }
+
+  if(auto memory = document["game/board/memory(type=RAM,content=Work)"]) {
+    ram.allocate(memory["size"].natural());
+  }
+}
+
+auto SystemCard::save(Markup::Node document) -> void {
+}
+
+auto SystemCard::read(uint8 bank, uint13 address) -> uint8 {
+  uint8 data = 0xff;
+
+  if(bank >= 0x00 && bank <= 0x3f) {
+    return rom.read((uint6)bank << 13 | address);
+  }
+
+  if(bank >= 0x68 && bank <= 0x7f) {
+    if(!ram) return data;
+    return ram.read((bank - 0x68) << 13 | address);
+  }
+
+  return data;
+}
+
+auto SystemCard::write(uint8 bank, uint13 address, uint8 data) -> void {
+  if(bank >= 0x68 && bank <= 0x7f) {
+    if(!ram) return;
+    return ram.write((bank - 0x68) << 13 | address, data);
+  }
+}
+
+auto SystemCard::power() -> void {
+}
+
+auto SystemCard::serialize(serializer& s) -> void {
+  if(ram) ram.serialize(s);
+}

higan/pce/cartridge/board/system-card.hpp

@@ -0,0 +1,11 @@
+struct SystemCard : Interface {
+  auto load(Markup::Node) -> void override;
+  auto save(Markup::Node) -> void override;
+  auto read(uint8 bank, uint13 address) -> uint8 override;
+  auto write(uint8 bank, uint13 address, uint8 data) -> void override;
+  auto power() -> void override;
+  auto serialize(serializer&) -> void override;
+
+  Memory::Readable<uint8> rom;
+  Memory::Writable<uint8> ram;
+};

higan/pce/cartridge/cartridge.cpp

@@ -43,13 +43,11 @@ auto Cartridge::connect(Node::Peripheral with) -> void {
   if(information.board == "Linear") board = new Board::Linear;
   if(information.board == "Split" ) board = new Board::Split;
   if(information.board == "Banked") board = new Board::Banked;
+  if(information.board == "RAM"   ) board = new Board::RAM;
+  if(information.board.match("System Card ?.??")) board = new Board::SystemCard;
   if(!board) board = new Board::Interface;
   board->load(document);
 
-  if(auto fp = platform->open(node, "save.ram", File::Read)) {
-    cpu.bram.load(fp);
-  }
-
   power();
 }
 
@@ -63,10 +61,6 @@ auto Cartridge::save() -> void {
   if(!node) return;
   auto document = BML::unserialize(information.manifest);
   board->save(document);
-
-  if(auto fp = platform->open(node, "save.ram", File::Write)) {
-    cpu.bram.save(fp);
-  }
 }
 
 auto Cartridge::power() -> void {

higan/pce/cpu/cpu.cpp

@@ -17,12 +17,10 @@ auto CPU::load(Node::Object parent, Node::Object from) -> void {
 
   if(Model::PCEngine())   ram.allocate( 8_KiB, 0x00);
   if(Model::SuperGrafx()) ram.allocate(32_KiB, 0x00);
-  bram.allocate(2_KiB);
 }
 
 auto CPU::unload() -> void {
   ram.reset();
-  bram.reset();
 
   node = {};
   eventInstruction = {};
@@ -71,6 +69,7 @@ auto CPU::step(uint clocks) -> void {
 
   Thread::step(clocks);
   synchronize(vdp);
+  if(PCD::Present()) synchronize(pcd);
 }
 
 auto CPU::power() -> void {

higan/pce/cpu/cpu.hpp

@@ -4,8 +4,7 @@ struct CPU : HuC6280, Thread {
   Node::Component node;
   Node::Instruction eventInstruction;
   Node::Notification eventInterrupt;
-  Memory::Writable<uint8> ram;   //PC Engine = 8KB, SuperGrafx = 32KB
-  Memory::Writable<uint8> bram;  //PC Engine CD-ROM Backup RAM = 2KB
+  Memory::Writable<uint8> ram;  //PC Engine = 8KB, SuperGrafx = 32KB
 
   //cpu.cpp
   auto load(Node::Object, Node::Object) -> void;

higan/pce/cpu/io.cpp

@@ -6,9 +6,16 @@ auto CPU::read(uint8 bank, uint13 address) -> uint8 {
     return cartridge.read(bank, address);
   }
 
-  //$f7  BRAM
+  //$80-87  CD WRAM
+  if(bank >= 0x80 && bank <= 0x87) {
+    if(PCD::Present()) return pcd.readWRAM(address);
+    return data;
+  }
+
+  //$f7  CD BRAM
   if(bank == 0xf7) {
-    return bram[address.bit(0,10)];
+    if(PCD::Present()) return pcd.readBRAM(bank.bit(0,2) << 13 | address);
+    return data;
   }
 
   //$f8-fb  RAM
@@ -56,7 +63,7 @@ auto CPU::read(uint8 bank, uint13 address) -> uint8 {
       data.bit(4)   = 1;
       data.bit(5)   = 1;
       data.bit(6)   = 0;  //device (0 = Turbografx-16; 1 = PC Engine)
-      data.bit(7)   = 0;  //add-on (0 = CD-ROM; 1 = nothing)
+      data.bit(7)   = PCD::Present() == 0;  //add-on (0 = CD-ROM; 1 = nothing)
       return data;
     }
 
@@ -89,8 +96,9 @@ auto CPU::read(uint8 bank, uint13 address) -> uint8 {
       }
     }
 
-    //$1800-1bff  CD-ROM
+    //$1800-1bff  CD I/O
     if((address & 0x1c00) == 0x1800) {
+      if(PCD::Present()) return pcd.read(address);
       return data;
     }
 
@@ -100,8 +108,6 @@ auto CPU::read(uint8 bank, uint13 address) -> uint8 {
     }
   }
 
-  //$80-f7  unmapped
-  //$fc-fe  unmapped
   return data;
 }
 
@@ -111,9 +117,15 @@ auto CPU::write(uint8 bank, uint13 address, uint8 data) -> void {
     return cartridge.write(bank, address, data);
   }
 
-  //$f7  BRAM
+  //$80-87  CD WRAM
+  if(bank >= 0x80 && bank <= 0x87) {
+    if(PCD::Present()) return pcd.writeWRAM(bank.bit(0,2) << 13 | address, data);
+    return;
+  }
+
+  //$f7  CD BRAM
   if(bank == 0xf7) {
-    bram[address.bit(0,10)] = data;
+    if(PCD::Present()) return pcd.writeBRAM(address, data);
     return;
   }
 
@@ -182,8 +194,9 @@ auto CPU::write(uint8 bank, uint13 address, uint8 data) -> void {
       }
     }
 
-    //$1800-1bff  CD-ROM
+    //$1800-1bff  CD I/O
     if((address & 0x1c00) == 0x1800) {
+      if(PCD::Present()) return pcd.write(address, data);
       return;
     }
 
@@ -193,8 +206,6 @@ auto CPU::write(uint8 bank, uint13 address, uint8 data) -> void {
     }
   }
 
-  //$80-f7  unmapped
-  //$fc-fe  unmapped
   return;
 }
 

higan/pce/cpu/serialization.cpp

@@ -3,7 +3,6 @@ auto CPU::serialize(serializer& s) -> void {
   Thread::serialize(s);
 
   ram.serialize(s);
-  bram.serialize(s);
 
   s.integer(irq2.disable);
   s.integer(irq2.pending);

higan/pce/pcd/io.cpp

@@ -0,0 +1,26 @@
+auto PCD::read(uint4 address) -> uint8 {
+//print("* ff:180", hex(address, 1L), "\n");
+
+  uint8 data = 0xff;
+  return data;
+}
+
+auto PCD::write(uint4 address, uint8 data) -> void {
+//print("* ff:180", hex(address, 1L), " = ", hex(data, 2L), "\n");
+}
+
+auto PCD::readWRAM(uint16 address) -> uint8 {
+  return wram.read(address);
+}
+
+auto PCD::writeWRAM(uint16 address, uint8 data) -> void {
+  return wram.write(address, data);
+}
+
+auto PCD::readBRAM(uint11 address) -> uint8 {
+  return bram.read(address);
+}
+
+auto PCD::writeBRAM(uint11 address, uint8 data) -> void {
+  return bram.write(address, data);
+}