Update to ares v114r25 release.

- PlayStation: implemented all GTE instructions (though certainly with many serious bugs remaining) - ares: improved Debug class notifications
higan-emu · Jul 23, 2020 · 8db2289 · 8db2289
1 parent 8802e32
commit 8db2289
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Showing 14 changed files with 502 additions and 411 deletions.
diff --git a/ares/ares/debug/debug.cpp b/ares/ares/debug/debug.cpp
@@ -1,6 +1,6 @@
 namespace ares {
 
-Debug debug;
+Debug _debug;
 
 auto Debug::reset() -> void {
   _unimplementedNotices.reset();

diff --git a/ares/ares/debug/debug.hpp b/ares/ares/debug/debug.hpp
@@ -1,6 +1,8 @@
 namespace ares {
 
 struct Debug {
+  static constexpr bool enabled = true;
+
   auto reset() -> void;
 
   template<typename... P> auto unimplemented(P&&... p) -> void {
@@ -13,6 +15,8 @@ struct Debug {
   vector<string> _unimplementedNotices;
 };
 
-extern Debug debug;
+extern Debug _debug;
 
 }
+
+#define debug(function, ...) if constexpr(ares::_debug.enabled) ares::_debug.function(__VA_ARGS__)
diff --git a/ares/ares/information.hpp b/ares/ares/information.hpp
@@ -2,7 +2,7 @@
 
 namespace ares {
   static const string Name       = "ares";
-  static const string Version    = "114.24";
+  static const string Version    = "114.25";
   static const string Copyright  = "ares team";
   static const string License    = "BY-NC-ND 4.0";
   static const string LicenseURI = "https://creativecommons.org/licenses/by-nc-nd/4.0/";

diff --git a/ares/ps1/cpu/core/core.cpp b/ares/ps1/cpu/core/core.cpp
@@ -43,6 +43,14 @@ auto CPU::instruction() -> void {
   }
 
   if constexpr(1) {
+    if constexpr(Accuracy::CPU::AlignmentErrors) {
+      if(unlikely(address & 3)) {
+        exception.busInstruction();
+        step(2);
+        return;
+      }
+    }
+
     pipeline.address = address;
     pipeline.instruction = bus.readWord(address);
     debugger.instruction();

diff --git a/ares/ps1/cpu/core/core.hpp b/ares/ps1/cpu/core/core.hpp
@@ -8,12 +8,12 @@
   auto powerCore(bool reset) -> void;
 
   //memory.cpp
-  auto readByte(u32 address) ->  u8;
-  auto readHalf(u32 address) -> u16;
+  auto readByte(u32 address) -> u32;
+  auto readHalf(u32 address) -> u32;
   auto readWord(u32 address) -> u32;
 
-  auto writeByte(u32 address,  u8 data) -> void;
-  auto writeHalf(u32 address, u16 data) -> void;
+  auto writeByte(u32 address, u32 data) -> void;
+  auto writeHalf(u32 address, u32 data) -> void;
   auto writeWord(u32 address, u32 data) -> void;
 
   //decoder.cpp

diff --git a/ares/ps1/cpu/core/cpu-instructions.cpp b/ares/ps1/cpu/core/cpu-instructions.cpp
@@ -117,11 +117,17 @@ auto CPU::instructionLBU(u32& rt, cu32& rs, i16 imm) -> void {
 }
 
 auto CPU::instructionLH(u32& rt, cu32& rs, i16 imm) -> void {
+  if constexpr(Accuracy::CPU::AlignmentErrors) {
+    if(unlikely(rs + imm & 1)) return exception.addressLoad();
+  }
   auto data = readHalf(rs + imm);
   fetch(rt, i16(data));
 }
 
 auto CPU::instructionLHU(u32& rt, cu32& rs, i16 imm) -> void {
+  if constexpr(Accuracy::CPU::AlignmentErrors) {
+    if(unlikely(rs + imm & 1)) return exception.addressLoad();
+  }
   auto data = readHalf(rs + imm);
   fetch(rt, u16(data));
 }
@@ -131,6 +137,9 @@ auto CPU::instructionLUI(u32& rt, u16 imm) -> void {
 }
 
 auto CPU::instructionLW(u32& rt, cu32& rs, i16 imm) -> void {
+  if constexpr(Accuracy::CPU::AlignmentErrors) {
+    if(unlikely(rs + imm & 3)) return exception.addressLoad();
+  }
   auto data = readWord(rs + imm);
   fetch(rt, i32(data));
 }
@@ -196,6 +205,9 @@ auto CPU::instructionSB(cu32& rt, cu32& rs, i16 imm) -> void {
 }
 
 auto CPU::instructionSH(cu32& rt, cu32& rs, i16 imm) -> void {
+  if constexpr(Accuracy::CPU::AlignmentErrors) {
+    if(rs + imm & 1) return exception.addressStore();
+  }
   writeHalf(rs + imm, rt);
 }
 
@@ -240,7 +252,7 @@ auto CPU::instructionSRLV(u32& rd, cu32& rt, cu32& rs) -> void {
 }
 
 auto CPU::instructionSUB(u32& rd, cu32& rs, cu32& rt) -> void {
-  if((rs ^ rt) & (rs ^ rs + rt) & 0x8000'0000) return exception.arithmeticOverflow();
+  if((rs ^ rt) & (rs ^ rs - rt) & 0x8000'0000) return exception.arithmeticOverflow();
   write(rd, rs - rt);
 }
 
@@ -249,6 +261,9 @@ auto CPU::instructionSUBU(u32& rd, cu32& rs, cu32& rt) -> void {
 }
 
 auto CPU::instructionSW(cu32& rt, cu32& rs, i16 imm) -> void {
+  if constexpr(Accuracy::CPU::AlignmentErrors) {
+    if(rs + imm & 3) return exception.addressStore();
+  }
   writeWord(rs + imm, rt);
 }
 

diff --git a/ares/ps1/cpu/core/decoder.hpp b/ares/ps1/cpu/core/decoder.hpp
@@ -250,27 +250,27 @@
   op(0x00, RTPS, LM, SF);
   op(0x01, RTPS, LM, SF);  //0x00 mirror?
   op(0x06, NCLIP);
-  op(0x0c, OP);
-  op(0x10, DPCS);
-  op(0x11, INTPL);
-  op(0x12, MVMVA, TV, MV, MM);
+  op(0x0c, OP, LM, SF);
+  op(0x10, DPCS, LM, SF);
+  op(0x11, INTPL, LM, SF);
+  op(0x12, MVMVA, LM, TV, MV, MM, SF);
   op(0x13, NCDS, LM, SF);
-  op(0x14, CDP);
+  op(0x14, CDP, LM, SF);
   op(0x16, NCDT, LM, SF);
-  op(0x1a, DCPL);  //0x29 mirror?
-  op(0x1b, NCCS);
-  op(0x1c, CC);
-  op(0x1e, NCS);
-  op(0x20, NCT);
-  op(0x28, SQR);
-  op(0x29, DCPL);
-  op(0x2a, DPCT);
+  op(0x1a, DCPL, LM, SF);  //0x29 mirror?
+  op(0x1b, NCCS, LM, SF);
+  op(0x1c, CC, LM, SF);
+  op(0x1e, NCS, LM, SF);
+  op(0x20, NCT, LM, SF);
+  op(0x28, SQR, LM, SF);
+  op(0x29, DCPL, LM, SF);
+  op(0x2a, DPCT, LM, SF);
   op(0x2d, AVSZ3);
   op(0x2e, AVSZ4);
   op(0x30, RTPT, LM, SF);
-  op(0x3d, GPF);
-  op(0x3e, GPL);
-  op(0x3f, NCCT);
+  op(0x3d, GPF, LM, SF);
+  op(0x3e, GPL, LM, SF);
+  op(0x3f, NCCT, LM, SF);
   }
   #undef LM
   #undef TV

diff --git a/ares/ps1/cpu/core/gte-instructions.cpp b/ares/ps1/cpu/core/gte-instructions.cpp
@@ -38,71 +38,93 @@ auto CPU::instructionAVSZ4() -> void {
   gte.updateError();
 }
 
-auto CPU::instructionCC() -> void {
+auto CPU::instructionCC(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.cc();
   gte.updateError();
 }
 
-auto CPU::instructionCDP() -> void {
+auto CPU::instructionCDP(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.cdp();
   gte.updateError();
 }
 
-auto CPU::instructionDCPL() -> void {
+auto CPU::instructionDCPL(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.dcpl();
   gte.updateError();
 }
 
-auto CPU::instructionDPCS() -> void {
+auto CPU::instructionDPCS(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.dpcs();
   gte.updateError();
 }
 
-auto CPU::instructionDPCT() -> void {
+auto CPU::instructionDPCT(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.dpct();
   gte.updateError();
 }
 
-auto CPU::instructionGPF() -> void {
+auto CPU::instructionGPF(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.gpf();
   gte.updateError();
 }
 
-auto CPU::instructionGPL() -> void {
+auto CPU::instructionGPL(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.gpl();
   gte.updateError();
 }
 
-auto CPU::instructionINTPL() -> void {
+auto CPU::instructionINTPL(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.intpl();
   gte.updateError();
 }
 
-auto CPU::instructionMVMVA(u8 tv, u8 mv, u8 mm) -> void {
+auto CPU::instructionMVMVA(bool lm, u8 tv, u8 mv, u8 mm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
   gte.tv = tv;
   gte.mv = mv;
   gte.mm = mm;
+  gte.sf = sf;
   gte.mvmva();
   gte.updateError();
 }
 
-auto CPU::instructionNCCS() -> void {
+auto CPU::instructionNCCS(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.nccs();
   gte.updateError();
 }
 
-auto CPU::instructionNCCT() -> void {
+auto CPU::instructionNCCT(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.ncct();
   gte.updateError();
 }
@@ -129,20 +151,26 @@ auto CPU::instructionNCLIP() -> void {
   gte.updateError();
 }
 
-auto CPU::instructionNCS() -> void {
+auto CPU::instructionNCS(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.ncs();
   gte.updateError();
 }
 
-auto CPU::instructionNCT() -> void {
+auto CPU::instructionNCT(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.nct();
   gte.updateError();
 }
 
-auto CPU::instructionOP() -> void {
+auto CPU::instructionOP(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.op();
   gte.updateError();
 }
@@ -163,8 +191,10 @@ auto CPU::instructionRTPT(bool lm, u8 sf) -> void {
   gte.updateError();
 }
 
-auto CPU::instructionSQR() -> void {
+auto CPU::instructionSQR(bool lm, u8 sf) -> void {
   gte.clearFlags();
+  gte.lm = lm;
+  gte.sf = sf;
   gte.sqr();
   gte.updateError();
 }