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Fix: double logging typo in RRC. Update readme
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hemanta212 committed Mar 19, 2022
1 parent ad934bc commit 0a1b7c6
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5 changes: 5 additions & 0 deletions README.org
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Expand Up @@ -47,6 +47,7 @@ For detailed examples on available commands, see file [[file:usage_examples.org]
- [x] - Implement basic commands (CMP/CPI, OUT)
- [x] - Implement comments, empty lines, HLT(no-effect)
- [x] - Release a pyinstaller executable
- [ ] - Implement commands (ANI, ORI, RRC, STAX)
- [ ] - ... ( a lot of commands)
- [ ] - Implement proper 8-bit 16-bit type system and validation
- [ ] - Implement a stacktrace in case of errors
Expand Down Expand Up @@ -87,7 +88,11 @@ ADI - Add Immediate
SUI - Subtract Immediate
CMP - Compare
CPI - Compare Immediate
ANI - And Immediate with Accumulator
ORI - OR Immediate with Accumulator
RRC - Rotate Right Accumulator
LDAX - Load accumulator from register pair
STAX - Store accumulator to register pair
INX - Incremented xtended register pairs
DCX - Decrement xtended register pairs
JZ - Jump If Zero
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10 changes: 0 additions & 10 deletions command_model.py
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Expand Up @@ -311,16 +311,6 @@ def rotate_right_accumulator(self) -> None:
f"{hex_to_simple(acc_value)} >> 1 -> {hex_to_simple(self.state.accumulator)}"
f"\nFLAGS: CY->{int(self.state.flags['carry'])}, S->{int(self.state.flags['sign'])}, Z->{int(self.state.flags['zero'])}"
)
self.change_state_flags(carry=True if shifted_bit == 1 else False)
self.change_state_flags(zero=True if result == 0 else False)
self.state.accumulator = f"0x{result:02x}"
logger.debug(
f"{acc_value} >> 1 -> {result}:{self.state.accumulator} CY->{shifted_bit}"
)
print(
f"{hex_to_simple(acc_value)} >> 1 -> {hex_to_simple(self.state.accumulator)}"
f"\nFLAGS: CY->{int(self.state.flags['carry'])}, S->{int(self.state.flags['sign'])}, Z->{int(self.state.flags['zero'])}"
)

def increment_register(self, args: tuple) -> None:
"""
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8 changes: 6 additions & 2 deletions usage_examples.org
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,11 @@
- [[#out][OUT]]
- [[#lxi][LXI]]
- [[#inxdcx][INX/DCX]]
- [[#stax][STAX]]
- [[#ldax][LDAX]]
- [[#ani][ANI]]
- [[#ori][ORI]]
- [[#rrc][RRC]]
- [[#practice-problems][Practice Problems]]
- [[#register-setup-from-1260-to-1264][Register setup from 1260 to 1264]]
- [[#simple][SIMPLE]]
Expand Down Expand Up @@ -452,8 +456,8 @@ For other we have to manually load the value to Accumulator
: A -> 02H
: 02H >> 1 -> 01H
: FLAGS: CY->0, S->0, Z->0
: 01H >> 1 -> 00H
: FLAGS: CY->1, S->0, Z->1
: 01H >> 1 -> 80H
: FLAGS: CY->1, S->0, Z->0

* Practice Problems
** Register setup from 1260 to 1264
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