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Disable 1, 8 and 16-bit int on thumbv7
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This is a workaround against LLVM Assertion. Looks like it'a a bug
since Cortex-M3 and Cortex-M4 do support unaligned access.
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agalakhov committed May 16, 2016
1 parent e074f5e commit f5a3a0d
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Showing 2 changed files with 2 additions and 2 deletions.
2 changes: 1 addition & 1 deletion thumbv7em-none-eabi.json
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
{
"arch": "arm",
"cpu": "cortex-m4",
"data-layout": "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64",
"data-layout": "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64",
"disable-redzone": true,
"executables": true,
"llvm-target": "thumbv7em-none-eabi",
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2 changes: 1 addition & 1 deletion thumbv7m-none-eabi.json
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
{
"arch": "arm",
"cpu": "cortex-m3",
"data-layout": "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64",
"data-layout": "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64",
"disable-redzone": true,
"executables": true,
"llvm-target": "thumbv7m-none-eabi",
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