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Update README #52

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Update README #52

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kraj pushed a commit to kraj/gcc that referenced this pull request Nov 2, 2020
arm: Improve thumb1_gen_const_int
011f5e9 
Enable thumb1_gen_const_int to generate RTL or asm depending on the
context, so that we avoid duplicating code to handle constants in
Thumb-1 with -mpure-code.

Use a template so that the algorithm is effectively shared, and
rely on two classes to handle the actual emission as RTL or asm.

The generated sequence is improved to handle right-shiftable and small
values with less instructions. We now generate:

128:
        movs    r0, r0, #128
264:
        movs    r3, gcc-mirror#33
        lsls    r3, gcc-mirror#3
510:
        movs    r3, #255
        lsls    r3, #1
512:
        movs    r3, #1
        lsls    r3, gcc-mirror#9
764:
        movs    r3, #191
        lsls    r3, gcc-mirror#2
65536:
        movs    r3, #1
        lsls    r3, gcc-mirror#16
0x123456:
        movs    r3, gcc-mirror#18 ;0x12
        lsls    r3, gcc-mirror#8
        adds    r3, gcc-mirror#52 ;0x34
        lsls    r3, gcc-mirror#8
        adds    r3, gcc-mirror#86 ;0x56
0x1123456:
        movs    r3, #137 ;0x89
        lsls    r3, gcc-mirror#8
        adds    r3, gcc-mirror#26 ;0x1a
        lsls    r3, gcc-mirror#8
        adds    r3, gcc-mirror#43 ;0x2b
        lsls    r3, #1
0x1000010:
        movs    r3, gcc-mirror#16
        lsls    r3, gcc-mirror#16
        adds    r3, #1
        lsls    r3, gcc-mirror#4
0x1000011:
        movs    r3, #1
        lsls    r3, gcc-mirror#24
        adds    r3, gcc-mirror#17
-8192:
	movs	r3, #1
	lsls	r3, gcc-mirror#13
	rsbs	r3, #0

The patch adds a testcase which does not fully exercise
thumb1_gen_const_int, as other existing patterns already catch small
constants.  These parts of thumb1_gen_const_int are used by
arm_thumb1_mi_thunk.

2020-11-02  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/arm.c (thumb1_const_rtl, thumb1_const_print): New
	classes.
	(thumb1_gen_const_int): Rename to ...
	(thumb1_gen_const_int_1): ... New helper function. Add capability
	to emit either RTL or asm, improve generated code.
	(thumb1_gen_const_int_rtl): New function.
	* config/arm/arm-protos.h (thumb1_gen_const_int): Rename to
	thumb1_gen_const_int_rtl.
	* config/arm/thumb1.md: Call thumb1_gen_const_int_rtl instead
	of thumb1_gen_const_int.

	gcc/testsuite/
	* gcc.target/arm/pure-code/no-literal-pool-m0.c: New.
@jwakely
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jwakely commented Jun 11, 2021

  1. This is an unofficial read-only mirror. Creating pull requests here is a waste of time.

  2. Your change is wrong, the grammar is correct and you are trying to make it wrong.

fxcoudert pushed a commit to fxcoudert/gcc that referenced this pull request Nov 26, 2021
@iains @fxcoudert
aarch64, Darwin: Constrain page offset values to fit in the relocation.
4b9a61d 
This fixes issue gcc-mirror#52.

We need to constrain the offsets in the @PAGE/@PAGEOFFS relocations
to fit in a 24bit field - +/- 8Mb.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>

gcc/
	* config/aarch64/aarch64.c
	(aarch64_load_symref_appropriately): If the offset will not fit
	into the relocation, then rewrite it as an addition.
markmentovai pushed a commit to markmentovai/gcc that referenced this pull request Jun 13, 2022
@iains
aarch64, Darwin: Constrain page offset values to fit in the relocation.
b13434b 
This fixes issue gcc-mirror#52.

We need to constrain the offsets in the @PAGE/@PAGEOFFS relocations
to fit in a 24bit field - +/- 8Mb.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>

gcc/
	* config/aarch64/aarch64.c
	(aarch64_load_symref_appropriately): If the offset will not fit
	into the relocation, then rewrite it as an addition.
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2 participants
@im-pankaj-00 @jwakely